Design Challenge for RC2014 compatible SBC

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Richard Deane

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Apr 22, 2019, 3:19:54 AM4/22/19
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Is anyone up for designing and publishing a PCB with easily procured components and implementations of CP/M, of what for me is an almost perfect system ? :

A working CP/M SBC with RC2014 bus compatibility (I/O not memory and cpu)
 - two serial ports
- RTC
- compatibility with ROMWBW inc sufficient rom/ram
- implements CP/M 3 and CP/M 2.2 (though CP/M 2.2 could be through ROMWBW support)
- has SD or Micro SD support (possibly in form of attached breakout board) (CF getting harder to source working cards)
- XMODEM and KERMIT in CP/M 2.2 and CP/M 3.
- Fast (rather vague but why not be fast?)
- I am not so retro as to suggest not using modern parts so happy for some simple SMD if the PCB has pads for hand soldering SMD, but sockets for non-through-hole chips.
- I am comfortable with use of Arduino-like support chip as long as long as serial I/O is implemented 100% compatible with generic kermit and xmodem, but real serial chips could be used.
- I am comfortable with socketed FPGA.


I am more of a software person so could not take on this challenge myself, but I've not yet found a solution that meets these goals and hope that this might appeal to one of you board designers?


Regards
Richard

Steve Cousins

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Apr 22, 2019, 4:14:18 AM4/22/19
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Hi Richard

I might be up for that. I've been thinking along those lines myself recently. 

I'm currently working on my Z180 module and its companion memory board. I built the Z180 module last year but didn't do much with it. I m currently waiting for the memory module boards to arrive from China. This pair of boards will give me a Z180 system, using on board peripherals for serial and memory management of the one megabyte memory module.

The Z180 board clocks at 18.432 MHz, with the possibility of clock doubling to 36 MHz via software. It includes two serial ports with baud rate control up to 115200 baud. The clocked serial port is available on a header to provide SPI signals for SD cards etc.

The memory board contains 512k bytes of RAM and two 512k byte ROM sockets. The ROM sockets allow easy switch selection between two sets of firmware. eg. Small Computer Monitor and RomWBW.

My thinking has been to combine these boards into an SBC with RC2014 sockets, so quite close to what you are looking for.

Combining the above with your request could lead to the following:

- SBC, perhaps about 100mm x 200mm
- Modular backplane section socket for expansion with SC113 backplane
- If room allows, one or more RC2014 80-pin vertical sockets
- Z8S180 CPU (in through hole PLCC socket) at 18.432 MHz, possibly overclocked to 36 MHz (software selectable)
- 1 x 512k RAM (in through hole dual in line socket)
- 2 x 512k FLASH (in through hole dual in line sockets), switch signal selectable
- 2 x 5v serial ports with software controlled baud rate selection
- Reset and voltage supervisor circuit using DS1233
- Header for SD breakout card on cable, or socket to fit direct to SBC
- Real time clock and battery
- Some parallel I/O:
- - Control of SPI device(s)
- - Status LEDs
- - Possible software selection of FLASH selection
- Jumpers to select which signals connect to RC2014 TX, RX and user lines
- Power input and switch similar to SC112 backplane

All of the above would be through hole 0.1 inch pitch soldering.

Plus all that lovely software :)

Steve

Richard Deane

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Apr 22, 2019, 4:30:36 AM4/22/19
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Wow, sounds a good fit to me. THANKS

Mikhail

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Apr 22, 2019, 4:51:39 AM4/22/19
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Phillip Stevens

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Apr 22, 2019, 5:25:41 AM4/22/19
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Hi Richard,

I've published something that is close to what you are looking for.

All the PCB designs, CUPL for the support logic in GAL, and bios is open source.
Supported by z88dk for native and CP/M applications, and also by FUZIX (thanks Alan, back to it soon as I'm finished with my current ieee floating point project).

There are a couple already built for sale on Tindie, but I gather you want to build it yourself.
From the designs published above you can use as a starting point to modify to get exactly what you need.

Regarding RC2014 bus compatibility, if you're leaving off memory and CPU control, then imho you're better off with a PIO device such as the 82C55, and using a well defined 24 bit cable like the IDE standard. On the other end of the cable you can break-out to a RC2014 expansion board (which I've not yet designed).

Also, there's a lot of really interesting sensors, displays, and other devices on I2C these days. Having I2C is a pretty interesting interface too.

Is anyone up for designing and publishing a PCB with easily procured components and implementations of CP/M, of what for me is an almost perfect system ? :

A working CP/M SBC with RC2014 bus compatibility (I/O not memory and cpu). - yes
 - two serial ports - yes, one with USB and one with ESP8266 WiFi
- RTC - yes via z180 timers, but no battery
- compatibility with ROMWBW inc sufficient rom/ram - yes if you'd like to write it.
- implements CP/M 3 and CP/M 2.2 - yes, and modern native development through z88dk
- has SD or Micro SD support (possibly in form of attached breakout board)  - no, has a full IDE interface for PATA drives. I use SSD PATA, which are easy to get.
- XMODEM and KERMIT in CP/M 2.2 and CP/M 3 - yes.
- Fast (rather vague but why not be fast?) - is 36MHz fast enough?
- I am not so retro as to suggest not using modern parts so happy for some simple SMD if the PCB has pads for hand soldering SMD, but sockets for non-through-hole chips. - has SMD to solder.
- I am comfortable with use of Arduino-like support chip as long as long as serial I/O is implemented 100% compatible with generic kermit and xmodem, but real serial chips could be used. - Uses period appropriate Lattice (or Atmel) GALs
- I am comfortable with socketed FPGA. - yes kind of, using GAL. Is that counted as a simple FPGA?

Other features
  • Am9511A Arithmetic (fixed and floating point) Processing Unit
  • Debounced Reset and Single Step
  • Single Step Circuitry triggered by I/O - start stepping from a software breakpoint
  • 9x TIL311 LEDs
  • 2x hardware buffered I2C interfaces.
Cheers, Phillip
 

Richard Deane

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Apr 22, 2019, 5:42:48 AM4/22/19
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Thanks, I had seen that already but misses out on my spec by not having disk storage on board. I assume it needs rc2014 ide and I wish to avoid mandatory bus connections to increase reliability and be easily encased in small enclosure.
Richard

Richard Deane

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Apr 22, 2019, 5:56:39 AM4/22/19
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Thanks, my enthusiasm is greater than my time available. Caring for my sick wife doesn’t give enough straight time to port romwbw, but soldering can be done in short interruptible stints. Also romwbw would need to be maintained by Wayne, therefore would need to be accepted by him so best to stay mainstream

Richard

Phillip Stevens

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Apr 22, 2019, 6:22:07 AM4/22/19
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Richard Deane wrote:
Thanks, I had seen that already but misses out on my spec by not having disk storage on board.

Yes, disk storage needs to be attached to an IDE cable.
I've run both 3.5" and 2.5" spinning drives, but generally a CF card in IDE (native) mode is sufficient.
PATA (IDE) SSD are opulent, but sweet. I use them in my old PowerMac and Ultra Sparc machines too. +1.

I assume it needs rc2014 ide.

No, a generic IDE interface is on board, driven by an 82C55 PIO.
Picture attached for reference. 
 
I wish to avoid mandatory bus connections to increase reliability.

Yes, also something I like to see.
 
Be easily encased in small enclosure.

Comes with mounting holes for that purpose, though I'm usually happy with rubber feet to protect my desk from solder pins.
 
Richard

Good luck.
Phillip 
IMG_2238.JPG

Bill Shen

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Apr 22, 2019, 7:20:05 AM4/22/19
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I'm on a "minimization" challenges this year.  The idea is to build a minimal system as the foundation for more advanced features to build on.  These are all 100mm X 100mm rev 0 (experimental) designs. 

First one is Z80MB64.  It is small, fast and CP/M ready to experiment with fast (20+MHz) RC2014 peripherals.  It has only one serial port and 128K RAM.  I'm thinking of replacing the 44-pin CPLD with a larger SMT CPLD so I can have 512K banked RAM, RTC, KIO, and ethernet.
https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:z80mb64

The 2nd design's pc board is on its way from China.  I don't have a photo other than the Gerber artwork.  It is a dead simple design,  motherboard with RAM/ROM/Z80/SIO2 and 3 RC2014 expansion slots, that's all, no glue logic.  A simple CF board will take one of the RC2014 slot to make it CP/M ready.  I have prototyped the design and it is running SCMonitor and CP/M.  The biggest draw back is it only runs at 7.37MHz.  The source of inspiration is this eBay kit which I did purchase one: https://www.ebay.com/itm/Z80-CPU-PIO-Kit-Z84C0020PEC-Z84C4006PEC-HM628128-W27C512-74LS32-74HC00-74HC138/113067844658

The third design maybe most interesting to you.  It is also glue-less Z80 SBC with 3 RC2014 expansion slots, but the SIO2 is replaced with KIO.  KIO is SIO2/CTC/PIO integrated in one chip running at 12.5MHz, but I find experimentally it can run easily at 20+Mhz.  Add the above CF disk, it is ready for CP/M.  The CF disk board is so simple that there are plenty of room for SD disk, RTC, and more.

All three designs are through-hole technology for hobbyists.  Board 1 design information is published.  I'll publish design information for board 2 & 3 when they are working.  BTW, for the last 2 months I've listed assembled/tested board 1 on eBay auction starting from 99cents.  I plan to do that for another 4 months as a test of retrocomputer market.
  Bill
Z80MB64-10.jpg
SIMPLE80_pcb.pdf
simple_cf_pcb.pdf
K80_Z80-KIO-RAM-ROM-RC2014.jpg

Bill Shen

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Apr 22, 2019, 7:30:11 AM4/22/19
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Regarding enclosure, I've been playing with a pared down version of Z80MB64 to fit Arduino mega case.  This is rev0, the CF disk is sticking out too much but I think putting Z80 in PLCC44 and go to SD disk can make it more compact.
  Bill
DSC_43540402.jpg
DSC_43550402.jpg

Richard Deane

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Apr 22, 2019, 11:36:23 AM4/22/19
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Sorry Phillip for the confusion - the Easy-z80 referred to by Mikhail doesn't have disk storage mentioned in the spec so I assume it only happens by attached rc2014 ide which breaks my aim for an SBC. no other boards essential but optionally can be added.

Richard

karlab

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Apr 22, 2019, 11:58:29 AM4/22/19
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Hi all and happy Easter!

There has already been produced a ton of SBCs, that is the common way to make computers.
The RC2014 system is the odd one by splitting up the design in separate modules (yes i know there are other modular designs).

Grant Searle’s original design which most of the RC2014 is basen on was a SBC.

Later more SBCs has arrived inspired by Grant’s design
Spencer’s mini
S. Cousins SC114
I think Tom S have made one
Linc1
Bill Shens many SBCs
Yaz180
I have probably missed many.

So there many to chose from already.
My most wanted feature in a new SBC is the inclusion of bit mapped graphics, video out, sound, sound out and keyboard in.

Karl

Richard Deane

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Apr 22, 2019, 1:40:01 PM4/22/19
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There are many to choose from, but none seen to match my "reasonable" spec. Some good ones on retrobrew are older and hence do use ide hd and/or floppy rather than SD. The two serial ports is essential in order to support console and printer or Kermit/ bbs connection
Richard

Steve Cousins

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May 28, 2019, 2:53:27 PM5/28/19
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So, I've taken Richard's design challenge. This is what I have so far.


SC126 v0.1 From above - cropped.jpg



Most importantly it has a row of LEDs to play with. Other specs:


- SBC / Motherboard format, 102mm x 160mm
- Modular backplane section socket for expansion with SC113 backplane
- Two RC2014 80-pin vertical sockets (plus the horizontal one for further expansion)
- Z8S180 CPU (in a through-hole PLCC socket) at 18.432 MHz, possibly overclocked to 36 MHz (software selectable)
- 1 x 512k RAM (in a through-hole dual-in-line socket)
- 2 x 512k FLASH (in through-hole, dual-in-line sockets), switch signal selectable
- 2 x 5v serial ports with software controlled baud rate selection
- Reset and voltage supervisor circuit using DS1233
- 2 x Headers for SPI / SD card breakout boards on cable, or socket to fit direct to SBC (clearance problem on v0.1 PCB!)
- SPI / SD card using Z180's fast clocked serial port
- I2C port (bit-bang)
- Real-time clock and battery
- Some parallel I/O:
- - Control of SPI device(s)
- - Control of LEDs
- - Software selection of FLASH chips
- Power input and switch similar to SC112 backplane
- All 0.1" pitch for easy soldering (except 32k crystal which I fix on next PCB)

Progress so far:
- Small Computer Monitor working
- CP/M working 
- LEDs working
- Second Flash chip working

SC126 v0.1 With CF module - original - Copy.jpg



Not yet tested:
- I2C port
- SPI / SD card ports
- Real-time clock

I hope to have RomWBW fully support this design.

The Z180 with 1M byte of memory is pushing my idea of "retro", but I've tried to bring some balance to the force by including quite a few discrete resistors. Nothing says "retro" like a row of pretty resistors.

I'll post more as the project progresses.

Steve


On Monday, 22 April 2019 08:19:54 UTC+1, Richard Deane wrote:

Richard Deane

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May 28, 2019, 5:15:34 PM5/28/19
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Excellent, I've been saving in my piggy bank!

Can Wayne be pursuaded to add CP/M 3 to Romwbw assuming there is no architectural reason why not? I'll volunteer as a beta tester.

Multicomp got close to my spec but is not rc2014 compatible and I suspect the timer interrupt on rst 7 interferes with debugger breakpoint handling.

Keep up the good work Steve and let me know when a board or kit is available on Tindie, I fancy some summer soldering to keep me out of gardening.

As a matter of interest, is there any reason why ez80 is not popular compared to z180 and z280?

Steve Cousins

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May 28, 2019, 5:26:52 PM5/28/19
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Not sure about CP/M 4 and ez80. 

I've attached the schematic and images of the PCB.

Steve
SC126 - PCBrender - top.jpg
SC126 v0.1 Schematic.pdf
SC126 - PCBrender - bottom.jpg

Alan Cox

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May 28, 2019, 9:42:58 PM5/28/19
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As a matter of  interest, is there any reason why ez80 is not popular compared to z180 and z280?


Packaging ? and at least historically it was much harder to work with toolwise. The Z180 has everything needed anyway at least if you add a few GPIO lines.

Alan


Alan Cox

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May 28, 2019, 9:47:07 PM5/28/19
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Timer interrupts and CP/M work fine and were common in CP/M 3 and of course MP/M. A good debugger checks if the 0038 address was called from an rst38 or not by checking via the stacked PC.

Alan


Bill Shen

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May 29, 2019, 12:28:13 AM5/29/19
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Very nice!  Z8S180 has very nice integrated set of peripherals and a fast CPU.

I've also thought about Richard's Challenge and how I can improve my baseline SBC.  To address the time/date function of CP/M 3, the baseline SBC should have a RTC, one with programmable periodic output that FUZIX can use.  Two or more full-feature serial ports are also desirable, I think Kermit may works better with separate serial port other than the console.  Based on my recent experience with KIO which is PIO/SIO/CTC integrated in a chip that can be overclocked significantly (>20MHz), I have a different solution to Richard's Challenge; it is a classical Z80 processor design with RAM/ROM/CPU and KIO plus RTC and compact flash interface;  I also want it to be a hobbyist-friendly through-hole design and stay with the economical 102mmX102mm format.  It has 2 classical RC2014 connectors (single row); in fact, the higher order 8 addresses are disconnected from Z80 bus and re-allocated to KIO's PIO jumper blocks.  Attached is schematic and gerber artwork of the design, K80.  It is rev0 prototype so probably not ready for production.  'K' also denotes 'Economy',  and I think with help of Z80 kits sellers proliferating on eBay, an cheap K80 kit may become available.

I was expecting the K80 pc boards this afternoon, but no delivery and I received an ominous "shipment on hold" tracking notification.  I'll find out what that's about tomorrow.
  Bill
K80_scm.pdf
K80_r0.zip
K80_top_gerber.jpg

karlab

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May 29, 2019, 4:33:52 AM5/29/19
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Hi Steve
You have been quiet for some time, so I suspected you were cooking something.
Very nice and clean design.
How does the PIO sc103 module work with the system? I am mainly thinking about bus speed and timing.
And why is it version 0.1? Do you have plans for updates?
Karl

Steve Cousins

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May 29, 2019, 4:56:31 AM5/29/19
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Karl

I normally just go straight for a v1.0 PCB, but this design is more complex than most of mine and there is quite a bit of stuff on there which is new to me. I, therefore, decided the first attempt would not be good enough and thus avoided wasting the coveted v1.0 release. It looks like that was a good call as I have already found a couple of minor cosmetic issues, plus a clearance problem connecting the SD breakout card I was expecting to be able to use. I somehow got the thing backwards in my head, which is electrically fine but creates a physical clearance problem. I'll use the v0.1 board to prove everything works (or not) and then release a v1.0, which should be an acceptable product.

I'm still unsure about the relationship between the available software selectable bus timings on the Z8S180 and the apparently much slower PIO, CTC, and SIO chips. I started to look into this for my SC111, Z8S180 module but didn't persevere to a conclusion. Trying to determine from the timing diagrams whether they are theoretically compatible is not as easy as it sounds. What I can tell you is that my SC111 module runs at 18.432 MHz (x1 internal) and I've successfully had it working with a 10MHz PIO (SC103). By "working" I only mean basic I/O functions. I've not tried interrupts.

Steve

Alan Cox

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May 29, 2019, 9:10:22 AM5/29/19
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> I'm still unsure about the relationship between the available software selectable bus timings on the Z8S180 and the apparently much slower PIO, CTC, and SIO chips. I started to look into this for my SC111, Z8S180 module but didn't persevere to a conclusion. Trying to determine from the timing diagrams whether they are theoretically compatible is not as easy as it sounds. What I can tell you is that my SC111 module runs at 18.432 MHz (x1 internal) and I've successfully had it working with a 10MHz PIO (SC103). By "working" I only mean basic I/O functions. I've not tried interrupts.

Similar experience providing you've got I/O wait states set. The only
PIO gotcha is the weird M1 behaviour for certain programming cases.
It's documented in the Z180 docs in the bit discussing M1 and
compatibility. I've not tested anything else as apart from some PIO
for chip selects there isn't much that's not already on the Z180. The
TMS9918A video would be a nightmare I am sure. Ben's 16550A ought to
work fine with a fast Z180 if an SIO doesn't.

One other thing - Steve, your SC111 have you considered whether the
DMA ready pin can be more usefully wired for external DMA, even
perhaps as 'always ready' assuming the Z180 allows that. Then you
could use the DMA channel to and from a CF adapter ?

Wayne Warthen

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May 29, 2019, 5:22:45 PM5/29/19
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On Tuesday, May 28, 2019 at 2:15:34 PM UTC-7, Richard Deane wrote:

Can Wayne be pursuaded to add  CP/M 3 to Romwbw assuming there is no architectural reason why not? I'll volunteer as a beta tester.


RomWBW can definitely support CP/M 3.  In fact, I did a proof of concept years ago.  The reason it is not entirely trivial is that RomWBW HBIOS has a dynamic device assignment mechanism.  A proper implementation of CP/M 3 on RomWBW needs some extra code to figure out the active devices at boot and dynamically configure for them.  CP/M 3 can do this, but it will require some work.  It is on my list!

-Wayne

Steve Cousins

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May 29, 2019, 5:28:48 PM5/29/19
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Alan

Good point about the DMA signals. The new motherboard does not bring them out either.

DREQ0 is multiplexed with CLK0 and TEND0 is multiplexed with CLK1. On SC111, CLK0 and CLK1 are available on a jumper header, so there is some limited access there. I guess I could extend the CSIO header to include the DREQ signals and perhaps also the TEND signals.

I wonder if we should have another go at trying to get a community agreement on uses for the pins that are available on an 80 pin bus connector but are not part of the official RC2014 bus spec. There seems to be a defacto 'standard' for A16 to A19, and perhaps A20 to A23. This leaves the pins next to A8 to A15 still uncommitted. Perhaps we should try to identify the best functions for these before they get significant ad-hoc use.

Steve

Alan Cox

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May 29, 2019, 6:33:30 PM5/29/19
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On Wed, 29 May 2019 at 22:28, Steve Cousins <steve...@gmail.com> wrote:
>
> Alan
>
> Good point about the DMA signals. The new motherboard does not bring them out either.
>
> DREQ0 is multiplexed with CLK0 and TEND0 is multiplexed with CLK1. On SC111, CLK0 and CLK1 are available on a jumper header, so there is some limited access there. I guess I could extend the CSIO header to include the DREQ signals and perhaps also the TEND signals.

\DREQ1 is the interesting one because even if you just pull it to
ready state permanently you can then (I think from the docs anyway)
use the DMA channel 1 controller to DMA to/from any device that
doesn't need waits between DMA accesses. So for example it might then
be possible to set the DMA wait states really low (like 1) and access
the CF adapter via DMA (PIO modes go down to 120ns cycle time)

> I wonder if we should have another go at trying to get a community agreement on uses for the pins that are available on an 80 pin bus connector but are not part of the official RC2014 bus spec. There seems to be a defacto 'standard' for A16 to A19, and perhaps A20 to A23. This leaves the pins next to A8 to A15 still uncommitted. Perhaps we should try to identify the best functions for these before they get significant ad-hoc use.

Judging from other bus designs there is a lot needed to get DMA
working in an adhoc way between cards and CPU. How for example do you
know which device is the current DMA target ?

Alan

Bill Shen

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May 29, 2019, 6:48:54 PM5/29/19
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"Shipment on hold" in this case means the shipment missed the scheduled air cargo plane and was on hold until next available plane.  So I received the pc boards today, instead of yesterday. 

Build up the first board and ported a simple monitor to check out the design.  It is running and is working at 22MHz CPU clock, in fact it is passing memory diagnostic at 24MHz, 28MHz, and 32MHz but failed at 33MHz!  Next step is to populate the CF adapter and port CP/M2.2 and SCMonitor to it.
  Bill
K80_no_CF_adapter.jpg

Bill Shen

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May 30, 2019, 9:14:49 AM5/30/19
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I installed the CF adapter and got enough CP/M2.2 working on K80 to run the comprehensive instruction test, zexall.com.  I've mentioned that memory diagnostic will run up to 32MHz, I was curious whether zexall.com will also run at 32MHz.  At 22MHz all is well and zexall ran to completion without error.  At 29.5MHz, the reliable, but slow CISCO CF disk does not respond with correct 'dir' listing.  File names were corrupted, this is a CF read problem because when I return back to 22MHz the 'dir' command of CISCO CF disk produced proper listing.  So I switched to the fast Sandisk 256Meg which worked fine at 29.5MHz and zexall.com ran to completion without error.  It took 26 minutes to run zexall.com at 29.5MHz which is the correct run time (it took 35.5 minutes to run zexall at 22MHz).

Tried 32MHz with the fast Sandisk CF.  CP/M started up, but I can't find any files with 'dir' command.  I think the CF disk access time is simply too short at 32MHz without wait state, but with insertion of wait states, I may still get it to run at 32MHz.  This is a rather astonishing development, I know I'm violating timings everywhere, but to run a design at 2.5x its nominally rated speed is not something you can do with modern electronics.  The design margin of Z80 products are amazing.

Photo shows K80 with 32MHz clock and fast Sandisk CF disk.

  Bill
DSC_44310530.jpg

Steve Cousins

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Jun 20, 2019, 5:09:12 AM6/20/19
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This discussion has been moved here as it is not Z80 based and its bus sockets are a superset of the RC2014 bus.



Bill Shen

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Jun 20, 2019, 7:59:58 AM6/20/19
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I do believe K80 is "designed for RC2014", so I'll continue it here.  I have had 5 new designs for RC2014 in the last month, K80 is one of them.  I'll be working on their documentation next couple weeks just to keep them straight in my head.  The beginning of the K80 documentation is here: https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:k80

CP/M 2.2 is running on K80.  The design is stable and the KIO can be overclocked to over 2.5x its timing spec which is nominally 12.5MHz.  I have not tested the RTC (based on DS1302) yet, my goal is CP/M3 with time/date function implemented; as well as fix the "DEVICE" command.
  Bill

Richard Deane

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Jun 20, 2019, 8:36:22 AM6/20/19
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Will the fix to device command be backported to cpm3 on zz80rc-cf?
Richard

Steve Cousins

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Jun 20, 2019, 9:24:15 AM6/20/19
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Sorry, Bill. I should have said that discussion related to my Z180 based solution to Richard's design challenge, has moved.

I forgot there were other designs being discussed in this topic.

Steve

Bill Shen

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Jun 20, 2019, 10:09:56 AM6/20/19
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Richard,
Yes, I'm updating all my CPM 2&3 BIOS based on feedbacks from several people. The DEVICE and IOByte are less meaningful for boards with single serial port, such as ZZ80CF, because all the redirection goes to the same serial port, but at least it won't hang the software.
Bill

Bill Shen

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Jun 20, 2019, 10:16:37 AM6/20/19
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Steve,
It is my assumption that K80 is within the "design for RC2014" scope. Two things may still disqualify it: it can run much faster than 7.37mhz, so arguably not compatible with any (or very few) existing RC2014 modules; and the IO addresses of KIO are not compatible with existing suite of SIO, CTC, and PIO, although it is possible to remap these device to arbitrary locations using CPLD, but I'm reluctant to do that.
Bill
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