
First thing I see is a 7Mhz clk for TX, I don't see any divider and the spec for a 68B50 is 2 Mhz.
The decoding he is doing will work, but may conflict with other
ports. I'd map out what ports are actually affected and double
check what other stuff is on the bus. I wrote my own driver for
mine.
But, with the RC2014 accepting so many different software
packages...
I've attached a blurb for the 68B50 I created for my TS2068 which after I corrected all my memory induced assumptions works quite well.
Also attached is the schematic for the TS2068 IO which may give some insight. It's all Z80, right?
I've really got to get my bench cleared off and finish my "Pro".
I assume that Tynemouth included driver data and addressing
information? And, how to use it with CP/M or the other RC2014
software?
Mike Sr aka Micro Mikie
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