AY-3-8912 PSG unreliable on Z80 at 7.3728Mhz

[Peter Onion]

I'm having problems with an AY-3-8912 PSG when running the CPU at7.7328Mhz.

At 3.6864Mhz it runs correctly.  Looking at BDIR, BC1 and D0  the timings are a bit marginal, especially the setup time on D0 when writing the register address, but the symptoms seem to be corrupt data being written to the correct register rather than correct data being written to the wrong register.

Has anyone else seen this ?

I'm about to try adding an extra wait state to all accesses to the PSG to see if that helps.

PeterO

[Peter Onion]

Early indications are that the additional wait state has cured the problem.  I guess this is the consequence of trying to put a device designed for a CPU with a 2.5Mhz clock on to the bus of a CPU with a 7Mhz clock :-)

Now to put the second PSG into its socket and build the stereo mixer circuit.

PeterO

[Joao Miguel Duraes]

Peter, what card do you have it on and is it working off the bus clock? The 8912 should be driven at the usual speeds (it does not have an internal divider like the YM2149. So, 1.7734MHz if you want Speccy-like timbre, or a simple /4 off your 7.3728MHz would also do it. 2.5MHz is the max.

M

[Joao Miguel Duraes]

One more thing: if you're going for a dual PSG setup and want to use existing music, don't send chip 1 to the left and chip 2 to the right.

TurboSound music has been written mostly with the ABC channels (A left, B 60% mixed into A and C, and C to the right) of each chip combined in this mix. Oh and at Pentagon 1.75MHz speeds. 

There are exceptions and personally prefer ACB instead, but all way combine A1+A2, B1+B2 and C1+C2 or if you really want to fancy it up, A1+C2, B1+B2 and C1+A2.

Choices... 

M

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[Peter Onion]

Joao, I'll reply to both of your messages:

I've built my own card.  The logic is similar to that on the YM2149 sound card that Z80kits sell,  but with slight "improvements" in the address decoding to use A1 to select between the two chips by driving the A8 pin on the PSG.  This is as yet untested as I've not yet inserted  the second PSG.

I've added a 1.7734Mhz output to my RP2350 based VDU and fed that along USR4 on the back plane.  The data sheet says 2Mhz is the Maximum.

I also added a 2Mhz output at the same time to drive CLK2 line so I can use the SIO/2 for MIDI in and out.

As you can see I have not built the mixing for the second PSG yet and I've not decided on the stereo mix either so your comments are useful. 

Please explain what "at Pentagon 1.75MHz speeds" means.  Is 1.75Mhz really 1.7734Mhz ?  I can change the clock division ratio in the RP2350 if needed, I could even add an API to do it "on the fly".

I've not looked into music players yet.  Do they use the RomWBW ay38910.asm driver or do they poke the cards directly ?  I need to add the ay38910.asm to my HBIOS config and I think I need a second device for the second PSG.

PeterO

   

[Joao Miguel Duraes]

Love it, Peter. I'm very fond audio experimentation. 

In sum, the Pentagon were (and still are) one of the many Soviet era ZX Spectrum clones. Whereas the Spectrum 128k moved to a 3.5469 MHz design to better align with PAL video, the Pentagon kept the original Speccy's 3.5 MHz design (and later Turbo at 7.0), so the AY on those machines runs at 1.75 MHz. The vast majority of AY music (beyond the Speccy games) tends to have been composed for that frequency nowadays. 

Purists will argue the right frequency is that of the 128k Speccy, so I too have created my SDC (software defined clock) off an RP2040, to cater for that. 

I've named it "Clever Clocks" (see what I did there?).

It is way more over-engineered than it needs to be, but I like to do things because I can...

Prototype above with multiple buttons allowing you to select clocks speeds on the fly, change orientation of the oled display and other things. 

I designed it to interface directly with Ed's rev6. 1 board. 

In situ. 

I then got some PCBs done, simplified to single button operation with 4 static clocks options for the most common music out there: Spectrum 128k 1.7734, Pentagon 1.75, Atari ST 2.0 (eek!) and of course our beloved RC2014. Sorry Amstrad CPC and MSX users, fret not - it's software defined so a tweak of the firmware and you can be in the game too. 

Finished product in action. 

Granted, there is enough power on that Xiao RP2040 to run a whole RC2014 emulated (Derek has proven that) but I did it to prove it could be done for under a tenner. And with a 100% unnecessary screen, because, bling. 😜 

I'm doing another further, smaller, simplified revision without an oled display which will use an RGB LED to show the speed we're on - although if you have played with it as often as I have, you can probably tell when the pitch of a song just sounds off... 

This is OSHW so happy to share with anyone interested. 

Regarding software, I am developing VibeTune and would be happy to add support for your card to be addressed whichever way you see fit. It supports both HBIOS and direct addressing modes already, anyway. Try to use MSX or Coleco I/O addresses though as already other things default to D8/D0. Ed explains it well, here: https://github.com/electrified/rc2014-ym2149

Back to the subject about channel mixing, have a play. At this stage of the game there are already so many variants out there of ABC, ACB, etc., that you will find that almost all emulated options cater for that and clock speeds. If you can, make it a switchable option (I can show you other hardware that does this). And if you can't be bothered about it, just pick one and join the party. 

M

P.S. I run seven sound cards simultaneously on my RC2014 blue box, all out to a mixing desk. Yeah, I have issues, I know... Now, if only Colin would sponsor me an SAA1099P card so I could work it into VibeTune... 😁 

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[Peter Onion]

Joao,

Thanks for the Pentagon info.  I was never a Spectrum (or any other home computer) user so I don't know all the "folklore" :-)  

I like the "Clever Clocks" concept, and I can see I will need to make the frequency generated by my RP2350 board configurable.  Easiest way is to add an addition function to the board interface to set the pio state machine's clock divisor.

I can easily move the port address to any odd numbered 16 port block as I have put A4 on the E3 input of the '138 address decoder.

Do you deal with multiple PSG's in the HBIOS driver or does your application code deal with them directly ? 

PeterO

[Alan Cox]

https://hackaday.io/project/190555-sa1099-sound-for-rcbus

I have spare PCBs for this and also the card with just a DAC interface for audio left I think.

Alan

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[Massimo]

To get a 1.77344MHz clock I made myself a little board using the 7490 based on this schematic that divides by 10 a 17.7344MHz oscillator input:

[Joao Miguel Duraes]

I believe that today (as of RomWBW v3.6), HBIOS can only address one AY at a time. ay38910.asm could be modified, certainly, but I feel I already ask too much of Wayne and my unorthodox methods may be too incompatible with the norm. 

As such, and because there are also more future considerations to be had, if a music file has support for TurboSound (2x AY-3891x/YM2149) then it can only use direct addressing mode. I do not have to deal with the PSGs at all today. VibeTune detects the two PSG channels and adapts to it, sending AY1 to one card, AY2 to the other :

In my case I use two of Ed's card on my system, one configured for MSX addressed, the other in Coleco mode (introduced to RomWBW in v3.6 - or maybe late 3.5. VibeTune routes the registers for AY1 and AY2 to their correspondent port - dirty easy hack.

But in your case, you might only have one set of addresses, in which case we need to talk about those "future considerations" I mentioned above. Also, because I've been working on a modification of Alex's (UR4QBP) TurboSound AVR-AY variant:

It uses 2x Atmega8 AVRs to emulate 2x AYs. Alex's version, mixes the channels in the AVRs and sends L+R channels out through the A and C ports on pins 4 and 38. I don't like that, so I've redesigned the board to output channel B unmixed, so that it is a drop-in replacement into Ed's board, where the channels ABC and then be mixed according to the Golden Ratio. 

But I have not thought that far as to how I will address each AVR - just coming out of some Covid fuzzy brain, so much to catch up on.

It's non-competing with your card, as you lose all the I/O ports with this design. The Atmega8 does not have enough spare pins to do that, so that was removed from the original AVR-AY design and carried over to the current generation.

M 

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[Joao Miguel Duraes]

I know Alan, it's already one of the 7 on my system.

Don't hate me please - I used your design to learn Kicad and how I could modify existing designs to do things that weren't intended to do in the first place (including silkscreening a logo into the large space left behind after I moved the autio stage to the right):

Either I have a set of duff SAA1099Ps, or I messed up somewhere. Even with the additional amp, everything sounds so muffled. Another one of those projects that I need to eventually get back to.

J.B.Langston's dual SN76489 is also rocking the party - I'm already having to use the external slot on my blue box!:

Ed's OPL card also sneakily making an appearance! lol

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[Peter Onion]

I already emailed Wayne earlier today to ask about ideas for extending the HBIOS driver to support multiple PSGs.

I don't expect anyone else to want to build my cards, I build them for my own entertainment so I'm not really that bothered about "compatibility", I just want to make them work.

As it is the first PSG is at $D0 (address) and $D1 (data R/W).  Second one is at $D2/$D3.  Others could be added at following pairs of address up to $DE/DF.

If I was going to do any vintage sound chip  emulation I would be using an RG2350 on a Pimoroni PGA2350 which has all 48 GPIO pins accessible.

[Joao Miguel Duraes]

I would definitely build it - I cannot help myself with audio/sound cards.

Meet my RE2:SPFM cabinet of doom.

Every reference FM (OPL, OPN, OPM, etc.), DCSG, PSG, [AD]PCM, arcade and home gaming machine you can think of, is probably covered in there.

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[Alan Cox]

Don't hate me please - I used your design to learn Kicad and how I could modify existing designs to do things that weren't intended to do in the first place (including silkscreening a logo into the large space left behind after I moved the autio stage to the right):

Hate ? That's the kind of thing that makes it even more worthwhile. Anyway I took the design from the data sheet and the Sam Coupe schematics 8)

If it's muffled it may be wrong resistor values. They ought to basically match the SAM as I was trying to get the same sound from it. Its ages ago now but its possible the original values given were wrong somewhere. I have vague recollections of fiddling with the ones on mine.

Alan

[Joao Miguel Duraes]

Yep, and I caught that: " Errata: R3 and R4 are listed as 10K in the original board. They should be 1K.". So no, probably not because of that.

But I think just spotted the issue - will test my theory when I have a moment and report back.

[Joao Miguel Duraes]

Oh, that definitely costs less than a tenner.

The big Q is: but can it do this? 

https://youtube.com/shorts/dfPPNMcht5A

:-)

[dean.ne...@gmail.com]

https://youtube.com/shorts/dfPPNMcht5A

Oh thats a clever clock indeed!  Nice one.

[Massimo]

Definitely not lol, pretty neat gadget.

Can you change clock from the system itself? If not I think you should expand the functionality to do that

[Joao Miguel Duraes]

Don't you give me any more ideas... lol. Yes, that shouldn't be hard at all - that's why I already put in a diode onto my design, to cater for preventing back powering, should we want to connect to the USB port live. 

Actually yes, I could implement a serial listener on the Xiao's TX/RX pins and then connect those to TX2/RX2 on the RC2014 bus, and use that to send commands to it, including changing clock speeds on the fly. Easy peasy.

But NO, I shall fix this flayed Mac PSU connector first! :-)

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[Peter Onion]

I have got the HBIOS driver to detect my card, and I've "hacked" a version of TUNES to use the correct ports as well...

And I have music Woo Hoo !! :-)

PeterO

[Peter Onion]

Proof if proof is needed :-)

I shall have to look at removing some of the high frequency noise, but the 5V supply is quite noisy to start with so it might be hard :-(

PeterO

[Massimo]

I had issues with noise when I was powering the RC2014 and the speaker (a soundbar) from my usual multiport USB power supply and I solved it by moving both to another from Ikea (SMÅHAGEL).

Now the soundbar is completely silent

[Joao Miguel Duraes]

Now try solving the noise issues with 7 simultaneous cards! 

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[Joao Miguel Duraes]

Forgot to say, nice, Peter.

Is that still with a 1WS or are you getting a 1.7x MHz clock source now?

[Peter Onion]

It wasn't the PSG clock frequency that was the problem, that has always been 1.7735Mhz.  The problem was the Z80 clock frequency.  With that at 7.3728Mhz the data bus wasn't quite meeting the setup and hold times for the PSG data lines.  At least that's what I observed on my 'scope.   So yes, there is still an additional wait state added to all the ins and outs to the PSGs. 

PeterO

[Joao Miguel Duraes]

There must be something up with your bus. I can even run a Z180 setup with the clock at 18.432 MHz, with the sound cards working just fine. I run primarily on a ZedPro backplane inside the blue box. I even have the additional slot on the back of the box in use, with no issues.

Could it be the fly over wires on the perfboard itself?

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[Peter Onion]

I've not had any other problems.  Maybe I have a slow PSG ?  

But I find it hard to see how a Z180 at 18.432Mz can meet the 400nS setup time and 100ns hold time for the PSG bus data when sending an address.   400nS is over 7 clock cycles !

PeterO

 

[Joao Miguel Duraes]

That statement is way above my pay grade, I'm afraid.

"It just works!" 

(C)2019 Todd Howard, Bethesda Game Studio"

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[Martin Giese]

If you want to hedge your bets on the stereo mixing, you might want to add some panpots :-)

Martin

[Joao Miguel Duraes]

Ah yes, how could I have forgotten about that? That is also on my to-do list. Martin shared with us a few weeks ago a lovely document explaining it very well:

https://groups.google.com/g/rc2014-z80/c/iMRmQw4TYbU/m/JR_avYMvCgAJ

M

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[Joao Miguel Duraes]

Don't like you anymore... You basically dictated the rest of my Sunday! lol :-)

[Massimo]

HAHAHA That's awesome

[Peter Onion]

More proof :-)

http://www.peteronion.org.uk/video/PSG.mp4

PeterO

[Joao Miguel Duraes]

Sounds about right to me.

Can you please tell us a little more about your RP2350 VDU?

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[Ed Silky]

Very nice!

-Ed

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[Peter Onion]

There's not much to tell.  It's an RP2350 sitting on the Z80 bus.  It appears like four I/O ports which the Z80 uses to pass commands to the RP2350.

The Z80 bus port read and write cycles are handled by PIO state machines and DMA controllers.  

The video is generated by a combination of PIO state machines and a DMA controller.

I've written a custom VDA driver for HBIOS that also provides the interface to a  PS/2 keyboard.

The video output drives an old MDA style CRT monitor.

The command set also include line draw and triangle filling primitives.

PeterO

    

[Jon Jones]

Are you using level shifts between the RP2350 & the Z80?

JJ

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[Peter Onion]

On Monday, 13 April 2026 at 21:29:37 UTC+1 Jon Jones wrote:

Are you using level shifts between the RP2350 & the Z80?

Yes, there are three 74LVC4245As which buffer every bus signal. Two are permanently set for 5v to 3v3 for address and control signals while the third one is on the databus and it switches direction to 3v3 to 5v when the Z80 executes a port read instruction. 

PeterO

 

[Ed Silky]

Hi,

I also interface an RP2040/2350 to the Z80, but I use a 74LVC245 on the data bus and 74LVC125 on the control signals powered from the 3.3V from the RP. Those parts accept 5V inputs with a VCC of 3.3V and the CMOS HI output from them meets the requirements of the TTL inputs on the Z80 side.

-Ed

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[Peter Onion]

Ed,

If you can accept the compromised noise immunity (*) of driving the Z80 5V bus with 3V3 signals, why not just connect the RP2XXX directly to the Z80 bus ?  After all they claim to be 5V tolerant. (**)

When I first built my RP2350 board it was as an experiment in trying to emulate all sorts of Z80 bus devices, including a DMA controller hence the use of bidirectional translating buffers on all the control, address and data bus signals..  

Initially it acted as 4K of RAM and 2K of which was video RAM for a text only display.

I decided a memory mapped display was going to be a bit difficult to integrate into RomWBW so I switched to a port based design.

I got no further than that with my experiments ;-)  

PeterO

(*) The noise levels I see on the 5V supply and bus signals mean I would not be happy doing that ! 

(**) Their "5V tolerant" has caveats !  Also my RP2350 is a A2 stepping, so "Errata RP2350-E9" was a concern at the time and that was the main reason that stopped me putting the RP2350 directly on the Z80 bus.  

[Ed Silky]

Hi Peter,

Nice to hear how you chose to use the RP2xxx. I also use it to provide different peripherals/functions; SD-Card, RTC (using an I2C module), USB keyboard, serial interface, etc.). The datasheet I have for the RP2040 doesn't indicate that it can accept 5V inputs. It says IOVDD+0.3V. The RP2350 does have a mode to tolerate 5V inputs, but as you mention, with caveats.

The 74LVC245 is designed as a bus transceiver,  So the ground undershoot, drive ringing, and other drive signal characteristics are much better for a bus than the SIO pins on the RP2xxx. The signals I see when the 74LVC245 is driving the bus look at least as good as I see from other (5V) devices when they are driving the bus.

At any rate, I'm not trying to argue, just indicating that I've had good success with the 74LVC245 (bidirectional) and 74LVC125 (unidirectional) parts to interface the RP2xxx (Pico) and other 3V3 devices to the Z80.

I actually use the Waveshare RP-Zero modules, which are nice and small (and cheap when you buy 10 at a time). They also have a NeoPixel for the status LED if you can give up a PIO-SM to enable it (sometimes I use it, sometimes not).

I also designed a debugging board that lets me use the full Pico debugging capabilities (SWD and serial) when plugged into my boards.

Waveshare Zero on the left, my debugging board with a Pico on the right:

-Ed

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[Peter Onion]

On Tuesday, 14 April 2026 at 17:54:10 UTC+1 Ed Silky wrote:

Hi Peter,

The 74LVC245 is designed as a bus transceiver,  So the ground undershoot, drive ringing, and other drive signal characteristics are much better for a bus than the SIO pins on the RP2xxx. The signals I see when the 74LVC245 is driving the bus look at least as good as I see from other (5V) devices when they are driving the bus.

I thought the 74LVC245 would only be able to pull the Z80 bus lines up to 3V3 ?

PeterO

[Ed Silky]

Hi Peter,

You are correct, the 74LVC245 (with VCC of 3.3V) will drive the bus at 3.3V. But, it is a very good/solid CMOS HI level (basically the 3.3V VCC). An LS-TTL gate has a VoH of 2.5 to 3.4V, so the 74LVC is providing a high level that is basically the same as a TTL device. The CMOS Z80 requires a ViH of 2.2V and the NMOS Z80 a ViH of 2.0V, so the 74LVC easily meets those requirements. 

The 74LVC245 is designed as a 'bus-driver' (as are the LVC240, 244, etc.), and it provides as good as, if not better, signal on the bus than a typical TTL gate does.

Of course, the 74LVC4245 (that you used) is made for a mixed-voltage application, so it is probably preferred. However, it is more expensive and might be harder to get. Plus, it needs to have both 3.3V and 5V routed to it. I wanted to mention what I use for others that might want to experiment with an RP2xxx. I also want to point out (to others that want to experiment) that some dual-voltage devices require a higher ViH on the 5V side than the Z80 is guaranteed to provide. They are often VCC-0.7 (so 4.3V). So you want to look at that when picking a part. The 74LVC4245 is 'TTL friendly', as it only requires a ViH of 2V on the 5V side.

-Ed

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[Peter Onion]

Yes, all good points.  I was just unsure what you meant when you said "at least as good as I see from other (5V) devices when they are driving the bus".  TBH I don't think I've ever seen any logic output signals sufficiently loaded that their high level output is much below 5V.  And the need for 5V and 3V3 was not an issue with 5V available from the back plane and 3V3 from the regulator on the PGA2350.

As an aside, when I first started on this I tried to use some of those "auto switching" level shifters, but only ever succeeded in making oscillators with them :-)  They seem very fussy about grounding, which with my construction methods is not as good as it would be if I made PCBs.

PeterO

[Ed Silky]

Ah, very good. Yeah, I've tried a few things, but found that this works well. It's great to see other designs and approaches. Makes people aware of the choices (and pitfalls).

-Ed

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[Ed Silky]

BTW... You must be looking at signals from those 'new fangled' 74HCT parts! ;-)  Signals from good old 74xx parts are often between 3 and 4 volts, unless they have a pull-up.

[Peter Onion]

On Wednesday, 15 April 2026 at 20:37:08 UTC+1 Ed Silky wrote:

BTW... You must be looking at signals from those 'new fangled' 74HCT parts! ;-)  Signals from good old 74xx parts are often between 3 and 4 volts, unless they have a pull-up.

Not really, I've been building logic since the 1980s (with 74LS in those days), and I don't ever remember seeing anything as low as 3 volts for a high logic level.  I would have probably thought I had a faulty chip if I had.

PeterO

 

 

[Ed Silky]

Hi Peter,

Our time frames are similar. I started my first job designing boards in 1979 and first worked with the Z80 in 1981. Anyway, the output of a TTL gate will typically be around 3.7V, due to the voltage drop across the upper transistor in the totem-pole output stage. Some devices may contain an internal pull-up resistor, but most don't. Some devices (often 74F parts) will be around 3V, and I've worked with some that are even lower.

-Ed

   

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[Joao Miguel Duraes]

My Clever Clocks' Xiao outputs the clock created with PWM at just under 3.21V, which the AY/YMs appear to handle fine as well. 

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[Peter Onion]

The second PSG is now installed and working, and I've added an active mixer daughter board.  The mixer is currently mixing A1+A2 -> Left  C1+C2 -> Right B1+B2 -> Center (70% mix).

[Ed Silky]

Nice! It would be great to get a sound clip when you get a chance.

-Ed

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