On Thu, 4 Aug 2022 at 11:38, Laszlo Szolnoki <
lgszo...@gmail.com> wrote:
>
> I think buffering should be part of the Rc2014 bus specification. In the 80's we used P8282 and P8216 for buffering. The basic principle was: 1 load unit per connected unit on the bus. So if there are multiple parts on the same bus line, buffering makes sense. Otherwise it is wasted space.
In the 1980s things like S100 were using a mix of 74 series devices
including 74F parts on a bus that wasn't so much designed as an
accident and so they needed buffering. On the other side of the fence
the 1802 based systems were CMOS and using all CMOS parts so didn't
because the signal levels are far better, the parts properly matched
for properties and the power consumption vastly lower.
RC2014 can run at 36MHz reliably it seems, so there is plenty of
headroom for more normal speeds. Not all the cards can run anywhere
near that - the 512K/512K card in particular is quite slow and I had
to swap one IC for a 74AHC part to run at 7.3MHz with a 65C816 (about
equivalent in bus cycle length to a Z80 at 20MHz+). Some of the 82C55
and 16x50 parts also get uppity once the write hold drops below about
20ns. The bus however is fine.
> As for the issues with CF, I'm pretty sure there is a timing issue on the bus and the IO addressing I usually see in the RC2014 environment could be the reason.
If you stick a good scope on it you'll see a few things aside from
some actual timing violations in the card versus the official ATA PIO0
(ie ISA bus) timings.
1. The power to the CF is critical (and the adapter just uses the 5v
from the bus). A modern era CF device is designed to drive 30cm of
cable between 0 and 5v fast enough for a 33MHz or higher transfer
rate. On a typical device the CF is on the same power as other high
current high noise devices not directly on the same thin power lines
as the logic.
2. Related to this you get a huge ground bounce when you switch
between things like 00 and FF so that also needs proper power
smoothing.
3. Because the signal edges are very very sharp and driving the bus
you've got a lot of other noise and mess and the CF is fast enough to
see bounces and glitches the other slower devices simply won't respond
to.
Buffering the CF at the CF end should help - the edges on the bus are
now the edges from the far slower 74HC(T) parts and any very short
bounces on the signals will not be seen by the slower drivers. Power
however is critical, proper capacitors and possibly even running
actual wire links.