Port A of the RC2014 dual serial module takes its clock source from the CLK signal on the bus.
Port B of the RC2014 dual serial module takes its clock source from the CLK2 signal on the enhanced bus or from the CLK signal when only a standard bus is available (and JP1 shunt is fitted)
The SIO can be programmed with a very limited number of internal divider options but not enough to get 9600 baud from the typical 7.3728 MHz clock.
If you have the RC2014 dual clock module you can select a much slower clock for CLK2 and thus obtain low baud rates on port B. The module can also generate lower clock speeds for CLK but this will slow the processor down to about 600kHz (I think) if the serial port is to run at 9600 baud. When used with SC114 you would need to remove the oscillator from SC114 to avoid a conflict with the dual clock module.
You could physically modify the module to disconnect CLK as the port A clock source and feed CLK2 to port A as well as port B.
When used with SC114, which has standard 40 pin bus sockets, you can not use the CLK2 signal so your options are more limited.