Own code to read IDE/SC729 CFCard

[Jon Jones]

I'm trying to scratch an itch to write my own code to read from a Compact Flash card/IDE interface and I'm failing miserably.

I've got a Z80 SBC with a SC729 Compact Flash card. (It's a 2GB card with a valid partition and 50MB FAT filesystem on it)

I've tried to get the drive info by writing 0xEC to port IDE_BASE+7 and then reading bytes - but I get nothing.

I've also tried reading the first sector by setting the four LBA registers to 0, setting sector count to 1 and then issuing command 0x20 to read (and wait for the Data Request flag) But again, that returns blank information.

I've tried to read the RomWBW code but it's written to handle lots of variations and I can't see the wood for the trees.

I've tried to find some simple code examples but my search engine skills are failing me tonight.

Can anyone give me any pointers as to where to look or what I might be doing wrong?

Thanks,

Jon.

[Alan Cox]

I've tried to get the drive info by writing 0xEC to port IDE_BASE+7 and then reading bytes - but I get nothing.

You need to set the drive selection first.

 

I've also tried reading the first sector by setting the four LBA registers to 0, setting sector count to 1 and then issuing command 0x20 to read (and wait for the Data Request flag) But again, that returns blank information.

And you will not be in LBA mode so 0,0,0 is invalid unless you switched to LBA.

 

I've tried to read the RomWBW code but it's written to handle lots of variations and I can't see the wood for the trees.

I've tried to find some simple code examples but my search engine skills are failing me tonight.

This is in C so may be easier to follow

 https://codeberg.org/EtchedPixels/FUZIX/src/commit/e6081eeaa80a998b95b070dc828932d18122f330/Kernel/dev/tinyide_discard.c

https://codeberg.org/EtchedPixels/FUZIX/src/commit/e6081eeaa80a998b95b070dc828932d18122f330/Kernel/dev/tinyide.c

[Jon Jones]

Thank you for this. I've been digesting your code, the RomWBW code and other sources and I *think* I need to:

1 - Write %00001110 to the Device Control Register (E) to reset the device
2 - Set 8-bit mode by writing %00000001 to the Feature Control Register (1)
3 - Enable LBA addressing and select the primary device by writing %11100000 to the Drive/Head register (6)
(All with appropriate status checks between each command)

I'll give it a go tonight once $DAY_JOB is finished.

Thank you,

Jon.

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[Michelle Lawson]

Donn Stewart, over at CPUville ( http://www.cpuville.com/index.html ) has some really simple code for reading and writing, in LBA mode, for CF cards. Check out the code on his monitor ROMs. I've used it as well on other projects.

[j...@nmysbh.co.uk]

That code looks perfect! I's almost the same as what I outlined this morning and answers a question I had stewing about reading the data bytes.

The only difference I can see is it doesn't specify 8 or 16 bits to the card.

Jon

On 14 Sep 2026, at 12:03, Michelle Lawson <michelle...@gmail.com> wrote:

Donn Stewart, over at CPUville ( http://www.cpuville.com/index.html ) has some really simple code for reading and writing, in LBA mode, for CF cards. Check out the code on his monitor ROMs. I've used it as well on other projects.

To view this discussion, visit https://groups.google.com/d/msgid/rc2014-z80/09399c4f-dafe-4625-bfb6-e0d3ac23a069n%40googlegroups.com.

[Bill Shen]

Your CF interface is correct.  Some people operated the CF in its native 16-bit mode, so set feature to 8-bit mode is not strictly necessary, but that may waste half of CF’s storage capacity.  Immediately after power on, CF is reset and pointed at its first sector, Master Boot Record, and the sector count register is pre-loaded with 1, so you can write 0x20 to its command register, wait a fraction of second then read the contents of MBR.  I have took advantage of this CF specification for a ROM-less SBC that executed the bootstrap program streaming out of MBR.  I also have a number of homebrews that have very small bootstrap program in CPLD to load and execute the initialization program in CF’s MBR then ran application codes stored in the CF.  CF effectively served as the ROM of the computer.

Bill

[j...@nmysbh.co.uk]

The Z80 is an 8-bit CPU so surely the interface must be set to 8-bit otherwise you'll loose half the data?

Jon

On 14 Sep 2026, at 13:20, Bill Shen <coinst...@gmail.com> wrote:

Your CF interface is correct.  Some people operated the CF in its native 16-bit mode, so set feature to 8-bit mode is not strictly necessary, but that may waste half of CF’s storage capacity.  Immediately after power on, CF is reset and pointed at its first sector, Master Boot Record, and the sector count register is pre-loaded with 1, so you can write 0x20 to its command register, wait a fraction of second then read the contents of MBR.  I have took advantage of this CF specification for a ROM-less SBC that executed the bootstrap program streaming out of MBR.  I also have a number of homebrews that have very small bootstrap program in CPLD to load and execute the initialization program in CF’s MBR then ran application codes stored in the CF.  CF effectively served as the ROM of the computer.

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[Mark T]

You would lose half the storage space, but you don’t lose any data if you never wrote anything to that space.

[Alan Cox]

Ok so there is no reset on the 8bit CF and reset done right is quite complicated so avoid that

The 8bit mode is a command so is issued like any other. The feature reg is just a parameter.

It helps I think to see it as a message passing protocol not control registers. Indeed that's why it's called a taskfile in IDE speak.

Wait until not busy

Select target

Wait until not busy

Load register values

Load command

Send data block if needed

Wait for data if to be received

Read data block if needed

Wait for completion 

Check for error

You are essentially passing messages to the disk.

Alan

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[Jon Jones]

Sorry, I don't understand this.

I assumed that 8 Vs 16 bit was whether the CFCard/IDE device uses 8 or 16 bits of its data bus to send/receive data.

Have I misunderstood what the 8 Vs 16 flag means?

Jon.

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[Mark Durham]

Having recently looked into this for my own 16-bit CF interface, as far as I can tell, the only difference between 8-bit mode and 16-bit mode occurs when reading and writing the 512 byte buffer on the CF card. In 8-bit mode you write 512 bytes (using D0..D7) and in 16-bit mode you write 256 words (using D0..D15). Any register reads or writes are always 8-bit.

I'll take a wild guess that the comments regarding losing half the storage space relate to leaving the card in 16-bit mode and writing 8-bit data to it.

Mark. 

[Bill Shen]

Reading/Writing lower 8-bit to 16-bit wide data bus thus wasting the upper 8-bit was exactly what I meant.  I read that practice was common a couple decades ago and I think it was because hobbyists were using spinning hard disks which don’t have the ability to switch from 16-bit to 8-bit and that practice carried into CF disk.  That’s my speculation.

Bill

[Alan Cox]

On Mon, 14 Sept 2026 at 17:13, Jon Jones <j...@nmysbh.co.uk> wrote:

Sorry, I don't understand this.

I assumed that 8 Vs 16 bit was whether the CFCard/IDE device uses 8 or 16 bits of its data bus to send/receive data.

Have I misunderstood what the 8 Vs 16 flag means?

Everything on IDE is a command. Writing the feature register of itself does nothing. If you look at the code you will see it writes the feature register then sends a command which tells the device to look at the feature register and do something.

It's a bit confused because the PC AT all those years ago had a real disk controller where there were real registers doing things and thus the names. IDE is arranged so the same sequence of register writes/reads work for basic disk read/write operations but actually work totally differently and all the added stuff works on the basis of putting values in the registers then issuing a command to do things.

Alan

 

[dean.ne...@gmail.com]

Hi Jon,

I just wanted to say thanks for sharing a little of your learning journey and to the master who have provided some guidance to you.  Your first comment said you were struggling a bit.  For sure, if was simple and trivial it would mean nothing.  

It so pleasing to see these human focused efforts in the retro space, and not some 'vibe coded' regurgitation producing no learning or experience.  

I remember when I started myself with getting a CF module working in my MSX based system - and the sense of achievement it produced. 

I had no idea about this 8bit/16bit thing and its history - quite interesting.

I hope you keep us posted on your progress.

Cheers

Dean

[Jon Jones]

If I manage to get it working, you'll hear the "YES!!!" even on your side of the plant Dean ;)

And thank you to everyone who's offered advice. I made some progress last night but ran out of time. Hoping to crack it tonight.

J

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[Jon Jones]

Progress update: Not *quite* there, but almost....

I tried hacking my code but never quite got it right, so I copied the disk_read routine from http://www.cpuville.com/Code/2K_ROM_8_asm.txt (Thank you Michelle)

That still barfed (Actually, my system rebooted)

Some judicious debugging and it seems that the read_loop was never exiting and it was going so far it was overwriting Important Memory.

I replaced the lines:

in a,(IDE_PORT+7) ;check status
and 08h ;DRQ bit
jp nz,read_loop ;loop until cleared

With a simple 512 byte loop counter using DE.

That cleanly exited but the data in the buffer was still wrong and the activity LEDs on the CF module were still lit once the code exited.

Putting the SD card into a linux box and using dd to read the first 512 bytes gives me:

0000000 33fa 8ec0 bcd0 7c00 f48b 0750 1f50 fcfb
0000010 00bf b906 0100 a5f2 1dea 0006 be00 07be
...

But from the buffer on my Z80 system, I'm getting:

8103: FA C0 D0 00 8A 50 50 FA BE 06 00 F2 EA 06 00 BE .....PP.........
8113: B2 80 80 0E 3C 74 82 10 CA EE 18 14 4C 8A 82 10 ....<t......L...

The observant amongst you will notice that the data from the Z80 code is just the odd bytes from the dd dump. EXCEPT...

A couple of bytes are wrong:

8b from dd becomes 8a on Z80
fa from dd becomes 8a on fb
bf from dd becomes 8a on be

(I haven't checked every byte, just the first couple of lines from dd)

So I have two problems: Missing half the data and a couple of corrupt bytes.

Focusing on the missing bytes, I think this is my friend of 8-bits Vs 16-bits.

In my code, I did add in a call to set 8-bit mode, but that didn't seem to work.

I'll post my code below. (Formatting is lost)

Help!

Jon


ORG $8000

LED_PORT equ 0x00
IDE_PORT equ 0x10

start:
LD C,LED_PORT
LD A,0x80
OUT (C), A

disk_read:
rd_status_loop_1:
in a,(IDE_PORT+7) ;check status
and 80h ;check BSY bit
jp nz,rd_status_loop_1 ;loop until not busy

LD C,LED_PORT
LD A,0x40
OUT (C), A

rd_status_loop_2:
in a,(IDE_PORT+7) ;check status
and 40h ;check DRDY bit
jp z,rd_status_loop_2 ;loop until ready

LD C,LED_PORT
LD A,0x20
OUT (C), A

ld a,01h ;number of sectors = 1
out (IDE_PORT+2),a ;sector count register

LD C,LED_PORT
LD A,0x10
OUT (C), A

ld a,0
out (IDE_PORT+3),a ;lba bits 0 - 7
; ld a,b
out (IDE_PORT+4),a ;lba bits 8 - 15
; ld a,e
out (IDE_PORT+5),a ;lba bits 16 - 23
ld a,%11100000 ;LBA mode, select drive 0
out (IDE_PORT+6),a ;drive/head register

LD C,LED_PORT
LD A,0x08
OUT (C), A

ld a,20h ;Read sector command
out (IDE_PORT+7),a
rd_wait_for_DRQ_set:
in a,(IDE_PORT+7) ;read status
and 08h ;DRQ bit
jp z,rd_wait_for_DRQ_set ;loop until bit set

LD C,LED_PORT
LD A,0x04
OUT (C), A

rd_wait_for_BSY_clear:
in a,(IDE_PORT+7)
and 80h
jp nz,rd_wait_for_BSY_clear
in a,(IDE_PORT+7) ;clear INTRQ

LD C,LED_PORT
LD A,0x02
OUT (C), A

; Enable 8-bit in Feature Register 1
; %00000001
LD C,IDE_PORT+1 ; Set 8-bit mode
LD A,%00000001
OUT (C),A

LD C,LED_PORT
LD A,0x01
OUT (C), A

LD HL,buffer
LD DE,512

read_loop:
in a,(IDE_PORT) ;get data
ld (hl),a
inc hl
; in a,(IDE_PORT+7) ;check status
; and 08h ;DRQ bit
; jp nz,read_loop ;loop until cleared
DEC E
JP NZ,read_loop
DEC D
JP NZ,read_loop

LD C,LED_PORT
LD A,0xFF
OUT (C), A

RET

buffer:
BYTE 0

[Jon Jones]

Having read the email after sending it, I noticed that my enable 8-bit mode was probably too late (After issuing the Read command) so I've tried moving it to both before the Read command and I've also tried before the set sector count setup.

Both still give me the same missing half of data.

Jon.

[Jon Jones]

PPS @Stephen Cousins: Your CF card module and SIO/CTC modules are not happy bed fellows. I had to swap to a regular SIO module.

Jon.

[Martin Israelsen]

Hi Jon,

8b, fb and bf all have the lowest bit set when read on your linux, but it’s missing when read on Z80. The other bytes do not have bit 0 set. 

It might be a cold solder joint somewhere.

Hex	Binary
fa	11111010
c0	11000000
d0	11010000
00	00000000
8b	10001011
50	01010000
50	01010000
fb	11111011
bf	10111111
06	00000110
00	00000000
f2	11110010
ea	11101010
06	00000110
00	00000000
be	10111110

Cheers

Martin

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[Jon Jones]

Good spot! Just reflowed the card connector and all the odd bytes are looking right now.

I just to find the even bytes now ;)

Thank you,

Jon.

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[Steve Cousins]

Hi Jon,

"PPS @Stephen Cousins: Your CF card module and SIO/CTC modules are not happy bed fellows. I had to swap to a regular SIO module."

Can you give full details of the hardware in question?
SC729  CF module
SC725  SIO+CTC module ???

others ???

Hopefully, I can recreate your system to test.

Could you tell me what the symptoms are when the SIO/CTC module is present?

If the SIO+CTC module is SC725, have you tried setting the jumpers to not using the CTC for baud rate generation? If the problem persists, have you tried removing the CTC from the module? This might give some clues as to the cause of the problem.

Steve

[Alan Cox]

Your odd bytes was probably the same. You would have written the wrong feature value I think due to the bad joint

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[Jon Jones]

I'm still getting the missing bytes after reflowing the connector.

Also the feature bit to disable 16-bit is bit 7 and it was bit zero that had the dodgy solder joint.

If bit 7 was faulty, surely the bytes I've got would have been wrong?

Copied from Martin's email:

d0 11010000
00 00000000
8b 10001011

Jon.

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[Alan Cox]

On Tue, 15 Sept 2026 at 21:32, Jon Jones <j...@nmysbh.co.uk> wrote:

I'm still getting the missing bytes after reflowing the connector.

Also the feature bit to disable 16-bit is bit 7 and it was bit zero that had the dodgy solder joint.

Selecting 8bit is 

          feature register to 0x01

          send command 0xEF

so both of those need the bottom bit correct and high.

 

Alan

[Jon Jones]

Ah - I think I've been missing a step! I've not been executing command 0xEF (Set Feature)

Near the top I've now got:

; Enable 8-bit in Feature Register 1
; %00000001
LD C,IDE_PORT+1 ; Set 8-bit mode
LD A,%00000001
OUT (C),A

LD C,IDE_PORT+7 ; Set feature
LD A,0xEF
OUT (C),A

The code then continues on setting the sector count & the LBA. It then issues the Read command and then just sits spinning at:

rd_wait_for_DRQ_set:
in a,(IDE_PORT+7) ;read status
and 08h ;DRQ bit
jp z,rd_wait_for_DRQ_set ;loop until bit set

(And if I comment that out, I just read lots of 0x04!)

For completeness the code (sans LED commands) is below

Jon

IDE_PORT equ 0x10

start:

disk_read:
rd_status_loop_1:
in a,(IDE_PORT+7) ;check status
and 80h ;check BSY bit
jp nz,rd_status_loop_1 ;loop until not busy

rd_status_loop_2:
in a,(IDE_PORT+7) ;check status
and 40h ;check DRDY bit
jp z,rd_status_loop_2 ;loop until ready

; Enable 8-bit in Feature Register 1
; %00000001
LD C,IDE_PORT+1 ; Set 8-bit mode
LD A,%00000001
OUT (C),A

LD C,IDE_PORT+7 ; Set feature
LD A,0xEF
OUT (C),A

ld a,01h ;number of sectors = 1
out (IDE_PORT+2),a ;sector count register

ld a,0
out (IDE_PORT+3),a ;lba bits 0 - 7
; ld a,b
out (IDE_PORT+4),a ;lba bits 8 - 15
; ld a,e
out (IDE_PORT+5),a ;lba bits 16 - 23
ld a,%11100000 ;LBA mode, select drive 0
out (IDE_PORT+6),a ;drive/head register
LD C,LED_PORT

LD A,0x04

OUT (C), A

ld a,20h ;Read sector command
out (IDE_PORT+7),a
rd_wait_for_DRQ_set:
in a,(IDE_PORT+7) ;read status
and 08h ;DRQ bit
jp z,rd_wait_for_DRQ_set ;loop until bit set

rd_wait_for_BSY_clear:
in a,(IDE_PORT+7)
and 80h
jp nz,rd_wait_for_BSY_clear
in a,(IDE_PORT+7) ;clear INTRQ

LD HL,buffer
LD DE,512

read_loop:
in a,(IDE_PORT) ;get data
ld (hl),a
inc hl
; in a,(IDE_PORT+7) ;check status
; and 08h ;DRQ bit
; jp nz,read_loop ;loop until cleared
DEC E
JP NZ,read_loop
DEC D
JP NZ,read_loop

ret

[Alan Cox]

Check for busy clear

Select the drive (0xE0 or 0xA0 for drive 0 depending upon LBA mode)

Check for busy clear

Load taskfile (the register values except command)

Wait DRDY (0x40) to go high

Load command

Wait 400ns  (not an issue on a typical Z80 board!)

Then if there is data wait for DRQ to go high (0x08)

Then transfer data

Then wait for BUSY to go low (0x80)

Then read status and bit 0 is high for an error

Apart from the drive select you need to do it for each command - so the EF command needs the same waits or you can end up issuing a read whilst it is doing the EF command.

It really is a message passing system disguised as some registers.

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[Jon Jones]

I think I have success!

80FA: FA 33 C0 8E D0 BC 00 7C 8B F4 50 07 50 1F FB FC .3.....|..P.P...
810A: BF 00 06 B9 00 01 F2 A5 EA 1D 06 00 00 BE BE 07 ................
811A: B3 04 80 3C 80 74 0E 80 3C 00 75 1C 83 C6 10 FE ...<.t..<.u.....
812A: CB 75 EF CD 18 8B 14 8B 4C 02 8B EE 83 C6 10 FE .u......L.......
813A: CB 74 1A 80 3C 00 74 F4 BE 8B 06 AC 3C 00 74 0B .t..<.t.....<.t.
814A: 56 BB 07 00 B4 0E CD 10 5E EB F0 EB FE BF 05 00 V.......^.......
815A: BB 00 7C B8 01 02 57 CD 13 5F 73 0C 33 C0 CD 13 ..|...W.._s.3...
816A: 4F 75 ED BE A3 06 EB D3 BE C2 06 BF FE 7D 81 3D Ou...........}.=
817A: 55 AA 75 C7 8B F5 EA 00 7C 00 00 49 6E 76 61 6C U.u.....|..Inval
818A: 69 64 20 70 61 72 74 69 74 69 6F 6E 20 74 61 62 id partition tab
819A: 6C 65 00 45 72 72 6F 72 20 6C 6F 61 64 69 6E 67 le.Error loading
81AA: 20 6F 70 65 72 61 74 69 6E 67 20 73 79 73 74 65 operating syste
81BA: 6D 00 4D 69 73 73 69 6E 67 20 6F 70 65 72 61 74 m.Missing operat
81CA: 69 6E 67 20 73 79 73 74 65 6D 00 00 00 00 00 00 ing system......

Jon

[dean.ne...@gmail.com]

I was outside hanging my washing on the clothes line - then all of a sudden all the birds in the treetops around me just scattered.

A small smile developed on my face - and I thought - "Hmm - looks like Jon's making progress!"

Congrats.

Dean

[Steve Cousins]

Good one Dean.

Cracking a problem can give you a warm fuzzy feeling inside. The resulting ripple in THE FORCE is an announcement to the galaxy that you're stubborn enough to succeed at anything. A sort of nerd alter to every intelligent life form out there.

[7alken]

hi Jon, congrats too :-)
P.

[Jon Jones]

Thank you all for your appreciation. And thanks to those who gave various pointers as to how to get over the line.

Jon.

[Tom Storey]

I dont believe you need to enable 8-bit mode every time you access a sector, that should be a one-off thing when you first initialise the card and it'll stay like that until it is reset or changed otherwise.

You can also improve your status checking loop to check both the BUSY and RDY (and DSC) bits in one go, such as:

rd_status_loop:

    in a,(IDE_PORT+7) ; Get status

    and D0h           ; Keep BUSY, RDY and DSC status bits

    cp 50h            ; CF is ready when BUSY is clear, RDY is set and DSC is set

    jp nz, rd_status_loop

Once all of the status bits are in their required states the loop will exit and the program continues on.

On Fri, 18 Sept 2026 at 07:32, Jon Jones <j...@nmysbh.co.uk> wrote:

Thank you all for your appreciation. And thanks to those who gave various pointers as to how to get over the line.

Jon.

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[Jon Jones]

Thank you for the suggestion around status flag checking. That was on my list to dig into understanding them all.

Jon.

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