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Welcome to the RapidWright Support Forum!

Post your questions related to anything RapidWright in this forum (you'll need to join first). RapidWright is an open source project from Xilinx, learn more at www.rapidwright.io.

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10/22/21

Transition to RapidWright GitHub Discussions

RapidWright will be transitioning to GitHub Discussions and winding down discussions on Google Groups

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Transition to RapidWright GitHub Discussions

RapidWright will be transitioning to GitHub Discussions and winding down discussions on Google Groups

10/22/21

Gabriel Cobos Tello, RapidWright4

10/20/21

Making a stuck-at fault by altering the cell pins and its INIT

In UltraScale and UltraScale+ (they share the same SLICE structure), there are shared control sets (

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Making a stuck-at fault by altering the cell pins and its INIT

In UltraScale and UltraScale+ (they share the same SLICE structure), there are shared control sets (

10/20/21

Gabriel Cobos Tello, RapidWright4

10/13/21

Bitstream manipulation

Hi Gabriel, I'm not familiar with Vivado essential bit files, so RapidWright probably doesn't

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Bitstream manipulation

Hi Gabriel, I'm not familiar with Vivado essential bit files, so RapidWright probably doesn't

10/13/21

Bharath S, RapidWright2

9/29/21

Md5sum of rapidwright_data.zip

Thank you for pointing this out! I've updated the file now, the md5sum should match now. During

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Md5sum of rapidwright_data.zip

Thank you for pointing this out! I've updated the file now, the md5sum should match now. During

9/29/21

Michael Graf_Research, RapidWright9

9/23/21

Accessing Zynq FTM_GPO/I Pins for Low Overhead PS/PL Communication

After playing around with the design a bit more, I was finally able to get it to work! The main issue

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Accessing Zynq FTM_GPO/I Pins for Low Overhead PS/PL Communication

After playing around with the design a bit more, I was finally able to get it to work! The main issue

9/23/21

Joe Kent, RapidWright3

9/20/21

I actually think I found a way around it. It may have just been my approach to writing the .dcp I set

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I actually think I found a way around it. It may have just been my approach to writing the .dcp I set

9/20/21

Laura L., RapidWright7

8/12/21

Hi, Ah, actually, I think I found an issue in my code that made the error occur. I was confused since

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Hi, Ah, actually, I think I found an issue in my code that made the error occur. I was confused since

8/12/21

G. BRICAS, RapidWright2

8/11/21

PIP.isUsed() / get all PIPs of a Switchbox

Hi Gaetan, For your first question, I don't believe that question can be answered directly

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PIP.isUsed() / get all PIPs of a Switchbox

Hi Gaetan, For your first question, I don't believe that question can be answered directly

8/11/21

G. BRICAS, RapidWright3

8/11/21

Split nets with multiple sink pins

Hi Chris, Thank you for your answer. The provided code works perfectly with my application! I now

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Split nets with multiple sink pins

Hi Chris, Thank you for your answer. The provided code works perfectly with my application! I now

8/11/21

Chris Lavin, Laura L.2

8/3/21

RE: Constraints

Hi, Ah, I see. The methods you mentioned worked the way I intended, thank you! Laura On Tuesday,

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RE: Constraints

Hi, Ah, I see. The methods you mentioned worked the way I intended, thank you! Laura On Tuesday,

8/3/21

Laura L., RapidWright5

7/21/21

Hi, Thank you so much this explanation is very helpful! Laura On Tuesday, July 20, 2021 at 10:06:42

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Hi, Thank you so much this explanation is very helpful! Laura On Tuesday, July 20, 2021 at 10:06:42

7/21/21

Laura L., RapidWright3

7/15/21

Starting a Project

Hi, I see, ok I think that worked for me as well. Thank you! Laura On Thursday, July 15, 2021 at 2:42

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Starting a Project

Hi, I see, ok I think that worked for me as well. Thank you! Laura On Thursday, July 15, 2021 at 2:42

7/15/21

Laura L., RapidWright4

7/12/21

Input File Types

Yes, that is correct. However, it is generally expected to be accompanied by the DCP that generated

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Input File Types

Yes, that is correct. However, it is generally expected to be accompanied by the DCP that generated

7/12/21

Christophe Alexandre, RapidWright4

5/19/21

Device Browser always showing a unique Device whatever the part selected

@jakobwenzel was able to provide a fix for this as of 058690c. So if you perform a 'git pull'

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Device Browser always showing a unique Device whatever the part selected

@jakobwenzel was able to provide a fix for this as of 058690c. So if you perform a 'git pull'

5/19/21

wenchen, pongstorn.maidee6

2/2/21

About the equation based timing delay model

Hi Wenchen, Sorry for late reply, Somehow I don't see the picture here. 1) That picture is not

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About the equation based timing delay model

Hi Wenchen, Sorry for late reply, Somehow I don't see the picture here. 1) That picture is not

2/2/21

wenchen, RapidWright8

12/15/20

How to get a physical intra-site net in RapidWright?

Hi Chris Thank you again for your patient explaination. Best Regards! Wen Chen 在2020年12月15日星期二 UTC+8

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How to get a physical intra-site net in RapidWright?

Hi Chris Thank you again for your patient explaination. Best Regards! Wen Chen 在2020年12月15日星期二 UTC+8

12/15/20

12/8/20

The same cell placed in RapidWright but unplaced in Vivado

Hi RapidWright! I updated the routing of a routed dcp file in RapidWright with

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The same cell placed in RapidWright but unplaced in Vivado

Hi RapidWright! I updated the routing of a routed dcp file in RapidWright with

12/8/20

wenchen, Pongstorn Maidee2

11/18/20

Can the lightweight timing model take into account the voltage factor?

Wen Chen, Without knowing any specific of what you are trying to do, I will comment in general.

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Can the lightweight timing model take into account the voltage factor?

Wen Chen, Without knowing any specific of what you are trying to do, I will comment in general.

11/18/20

wenchen, RapidWright4

11/2/20

How to place a BUFG in RapidWright

Thank you Chris 在 2020年11月3日星期二 UTC+8上午7:59:18，RapidWright写道： The problem here is that some sites can

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How to place a BUFG in RapidWright

Thank you Chris 在 2020年11月3日星期二 UTC+8上午7:59:18，RapidWright写道： The problem here is that some sites can

11/2/20

wenchen, RapidWright5

11/2/20

What is the difference between EDIFCell and EDIFCellInst

Hi Chris, I get it. Thank you for your reply! WenChen 在2020年10月31日星期六 UTC+8 下午12:17:01<RapidWright

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What is the difference between EDIFCell and EDIFCellInst

Hi Chris, I get it. Thank you for your reply! WenChen 在2020年10月31日星期六 UTC+8 下午12:17:01<RapidWright

11/2/20

wenchen, RapidWright5

10/29/20

Add a new route to a post-route dcp

Thank you Chris 在 2020年10月30日星期五 UTC+8上午1:19:55，RapidWright写道： Hi WenChen, Either solution can work.

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Add a new route to a post-route dcp

Thank you Chris 在 2020年10月30日星期五 UTC+8上午1:19:55，RapidWright写道： Hi WenChen, Either solution can work.

10/29/20

BOYANG ZHANG, RapidWright3

10/19/20

Hi Boyang, The placeCell() API you mentioned seems like it should work. The warnings you are seeing

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Hi Boyang, The placeCell() API you mentioned seems like it should work. The warnings you are seeing

10/19/20

BOYANG ZHANG, RapidWright4

9/14/20

Total Wire Length Calculation

This method was written and committed somewhat recently, perhaps you just need to pull the latest

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Total Wire Length Calculation

This method was written and committed somewhat recently, perhaps you just need to pull the latest

9/14/20

7/2/20

Exception in thread "main" java.lang.IllegalArgumentException: Class is not registered: com.xilinx.rapidwright.edif.EDIFNetlist

I'm trying to run the tutorial "Build an IP Integrator Design with Pre-Implemented Blocks

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Exception in thread "main" java.lang.IllegalArgumentException: Class is not registered: com.xilinx.rapidwright.edif.EDIFNetlist

I'm trying to run the tutorial "Build an IP Integrator Design with Pre-Implemented Blocks

7/2/20

qaarah, RapidWright6

5/30/20

New route from Source to Sink

Hi, Using the above code, I get errors while compiling these two commands. This return the dcp

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New route from Source to Sink

Hi, Using the above code, I get errors while compiling these two commands. This return the dcp

5/30/20

Jiang Weixiong, … qaarah6

5/30/20

How to modify a routed dcp?

Hi, Thanks for the post and the code. I am following this post for my practice and learning of

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How to modify a routed dcp?

Hi, Thanks for the post and the code. I am following this post for my practice and learning of

5/30/20

Masood Raeisi, RapidWright4

4/29/20

Tile column Pattern analysis

Here is one way off the top of my head... >>> filtered = list(filter(lambda e: e.getKey().

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Tile column Pattern analysis

Here is one way off the top of my head... >>> filtered = list(filter(lambda e: e.getKey().

4/29/20

Syed Ahmed, RapidWright2

3/5/20

Aspect ratio of Pblock

The PBlockGenerator was written with the goal of finding pblocks that could easily allow a module to

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Aspect ratio of Pblock

The PBlockGenerator was written with the goal of finding pblocks that could easily allow a module to

3/5/20

2/24/20

TileColumnPattern and drawing Pblocks

Answering my questions, - the column 591 doesn't get highlighted because it's a different CLB

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TileColumnPattern and drawing Pblocks

Answering my questions, - the column 591 doesn't get highlighted because it's a different CLB

2/24/20

parachu...@gmail.com, … Syed Ahmed3

2/20/20

Using RapidWright with a Mac

Leaving this note here if anybody's looking for a solution for MacOS Mojave. The workaround is

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Using RapidWright with a Mac

Leaving this note here if anybody's looking for a solution for MacOS Mojave. The workaround is

2/20/20

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