new Architecture?

[John Clements]

Goodness… Apple is changing processors again. Am I right in thinking that the support that Matthew added for Aarch64 early this year positions us unbelievably well for the transition to Apple silicon & specifically the M1 chip? Or maybe everyone but me already knew this was coming?

John

[John Clements]

[Matthew Flatt]

Some of us had heard about it, at least. :)


Matthew

[John Clements]

Yeah, a bit of internet searching suggests that there have been rumors about this floating around. Is this work available on the main chez branch? I just spent some time on the chez web page, and it’s astonishingly opaque; I can’t see any mention at all of what architectures it supports, which you’d think would be a front-page item for a native compiler.

All of which is to say: many thanks to you & whoever else made this happen.

John

[Philip McGrath]

On Thu, Nov 12, 2020 at 6:09 PM 'John Clements' via Racket Developers <racke...@googlegroups.com> wrote:

I just spent some time on the chez web page, and it’s astonishingly opaque; I can’t see any mention at all of what architectures it supports, which you’d think would be a front-page item for a native compiler.

I think you want https://cisco.github.io/ChezScheme/release_notes/v9.5/release_notes.html, which says:

• Linux x86, nonthreaded (i3le) and threaded (ti3le)
• Linux x86_64, nonthreaded (a6le) and threaded (ta6le)
• MacOS X x86, nonthreaded (i3osx) and threaded (ti3osx)
• MacOS X x86_64, nonthreaded (a6osx) and threaded (ta6osx)
• Linux ARMv6 (32-bit), nonthreaded (arm32le)
• Linux PowerPC (32-bit), nonthreaded (ppc32le) and threaded (tppc32le)
• Windows x86, nonthreaded (i3nt) and threaded (ti3nt)
• Windows x86_64, nonthreaded (a6nt) and threaded (ta6nt) [experimental]

(The source file has commented-out lines about OpenSolaris and various BSDs.)

-Philip

[John Clements]

> On Nov 12, 2020, at 3:37 PM, Philip McGrath <phi...@philipmcgrath.com> wrote:

>
> On Thu, Nov 12, 2020 at 6:09 PM 'John Clements' via Racket Developers <racke...@googlegroups.com> wrote:
> I just spent some time on the chez web page, and it’s astonishingly opaque; I can’t see any mention at all of what architectures it supports, which you’d think would be a front-page item for a native compiler.
>

> I think you want https://cisco.github.io/ChezScheme/release_notes/v9.5/release_notes.html, which says:
> • Linux x86, nonthreaded (i3le) and threaded (ti3le)
> • Linux x86_64, nonthreaded (a6le) and threaded (ta6le)
> • MacOS X x86, nonthreaded (i3osx) and threaded (ti3osx)
> • MacOS X x86_64, nonthreaded (a6osx) and threaded (ta6osx)
> • Linux ARMv6 (32-bit), nonthreaded (arm32le)
> • Linux PowerPC (32-bit), nonthreaded (ppc32le) and threaded (tppc32le)
> • Windows x86, nonthreaded (i3nt) and threaded (ti3nt)
> • Windows x86_64, nonthreaded (a6nt) and threaded (ta6nt) [experimental]
> (The source file has commented-out lines about OpenSolaris and various BSDs.)

Ah! Makes sense. So it sounds like the Aarch64 code is not yet part of the main repo.

Thanks,

John

[Andre Garzia]

Hi,

Just to confirm that Racket v7.9 (regular version) is crashing when launching under rosetta 2.

Kind regards

Andre

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[Paulo Matos]

Philip McGrath writes:

> On Thu, Nov 12, 2020 at 6:09 PM 'John Clements' via Racket Developers <
> racke...@googlegroups.com> wrote:
>
>> I just spent some time on the chez web page, and it’s astonishingly
>> opaque; I can’t see any mention at all of what architectures it supports,
>> which you’d think would be a front-page item for a native compiler.
>>
>
> I think you want
> https://cisco.github.io/ChezScheme/release_notes/v9.5/release_notes.html,
> which says:

Please do not point to Chez's notes anymore.
I think Racket's fork of Chez is now different enough that it might not
be totally meaningful to check those notes.

RacketCS has aarch64 support and we have been testing it in CI for a
while.

--
Paulo Matos

[Paulo Matos]

'John Clements' via Racket Developers writes:

> Goodness… Apple is changing processors again. Am I right in thinking that the support that Matthew added for Aarch64 early this year positions us unbelievably well for the transition to Apple silicon & specifically the M1 chip? Or maybe everyone but me already knew this was coming?
>
> John

This was known as far back as early 2020. Myself and Jesse discussed
attempting to port Chez to Aarch64 for this reason. However, this was in
the midst of other work, so without any real progress, later on Matthew
became interested (I suppose he hard about Apple Silion as well) and
developed a new backend for Aarch64 in a couple of weeks.

This is now being regularly tested in CI.
https://github.com/racket/racket/actions?query=workflow%3A%22ARM64+Linux+Fast+Build%22
https://github.com/racket/racket/actions?query=workflow%3A%22CI+Linux+ARM%22

Regards,

--
Paulo Matos