How ntstore work in detail?

[Hyojae Yun]

Hi all,

I roughly know that the ntstore instruction (non-temporal store) bypass the cache hierarchy and directly store data in PMEM.

But I don't know detail behavior of the ntstore instruction.

As my expectation,

1) The register's data is stored to the 'store buffer' (or specific buffer (Write combining buffer?) only for the ntstore),

And then bybass all of the cache hierarchy (from L1 cache to WPQ(Write Pending Queue) on integrated memory controller).

Finally, buffer's data directly is stored in the XP-buffer which PMEM has.

Is it right?

Thank you for reading :)

[Andy Rudoff]

Hi,

While I pretty much agree with your stated expectation, there are lots of details around NT stores, especially around ordering and coherency.  Too much detail for me to paste it all here, so I suggest reading the section about it in Intel's SDM, Volume 1, Section 10.4.6.2 "Caching of Temporal vs. Non-Temporal Data".

-andy