Write through caching

[Brian C Demsky]

We noticed that x86 supports write through caching.  Has anyone tried to use this with persistent memory devices or CXL?  It seems like it would get rid of the need to manually do cache line flushes after stores?  Is the performance worse than doing explicit flushes after stores?  Also, the Intel manual mentions something about write combining in this mode, but it isn't clear of whether this can be done for normal stores to memory?