Deposit & Exam with a nonzero IF reg

[HB Eggenstein]

The current implementation in the PiDP8i software restricts deposit and exam to the first 4096 words of memory, the IF register is ignored. However, the comments in the source code mention that this might be wrong and might need fixing.

Just to make sure: I assume the real PDP-8i did respect the IF register setting when using "Deposit" and "Examine" ? The wording in the original documentation is actually a bit ambiguous.

 What happened when you reached the page boundary when depositing? I assume  PC wrapped around but IF remained set to the same page?

What happened when you deposit / examine data to/from non-existing memory on machines with less than 32 kw of memory?

Cheers

HB

[HB Eggenstein]

arrgggh....replace "page" in my message with "field" . Sorry for the wrong "PDP-8 speak".

HB

[Steve Tockey]

HB,

The behavior on a real PDP-8/I (or any -8 for that matter) with extended memory is as follows: For purposes of Deposit and Exam, IF is ignored. Only DF is signficant. If you set the Switch Register to any

DIAAAA

where D is a Data Field, I is an Inst Field, and AAAA is a 4k memory address, both Exam and Dep will be reading and writing from extended memory address DAAAA. Example:

On a real PDP-8/I with at least 28k memory:

1) Hit Stop (HALT on an 8/e, 8/m, 8/f)

2) Set the SR to 543210, Hit Load Add (Set SR = 0045, hit EXT ADDR LOAD, set SR = 3210, hit ADDR LOAD on an 8/e, 8/m, 8/f)

3) Hit Exam. You will now see the contents of extended memory address 53210 in the Memory Buffer (MD on an 8/e,8/m,8/f). It is likely to be 0000 but could be anything.

4) Hit Load Add (ADDR LOAD) to reset the Memory Address to 53210 because the Exam incremented the MA

5) Hit Dep (raise DEP)

6)  Hit Load Add (ADDR LOAD) to reset the Memory Address to 53210 because the Dep incremented the MA

7)  Hit Exam (EXAM). You will now see 3210 in the Memory Buffer (MD).

HA! I just remembered. All boot scripts in the PiDP-8/I contain the line "set df disabled" so that  USB Media can be selected. So yes, the PiDP-8/i does not behave like a real PDP-8/I. Load Add on a PiDP-8/I does not write to DF. Meaning you are restricted to Field 0 when using Dep and Exam on the front panel. And it is intentional.

The defined behavior on all real -8 hardware is that DEPositing or EXAMining from 7777 through to 0000 does not affect DF. Specifically, if the current extended memory address is 57777 and you either DEP or EXAM, the new EMA will be 50000, not 60000.

EXAMining non-existent memory will either give you 0000 or 7777 depending on if the Data Bus is pulled low vs. pulled high. The -8, -8/I, -8/L, -/S are all negative logic, 0v = 0, -3v = 1. On the other hand, -8/e, -8/m, -8/f, and -8/a all positive logic, 0v = 0, 3v (TTL high) = 1. I believe, but I wouldn't guarantee, that you'd always get 0000 on an EXAM on any -8. DEPositing into non-existent memory is ignored.

If  machine code reads or writes non-existent memory, it behaves exactly the same as EXAM or DEP do through the front panel. Specifically, there's no hardware trap on non-existent memory. On any real -8, if you want to see if Field X is present you have to write a value that's not 0000 or 7777 in that field and then read it back and check if it's the same as what you wrote. Having determined that any address in a field exists, then you know that the entire 4k field exists because real -8 memory doesn't come in units smaller than 4k.

Cheers,

-- steve

[HB Eggenstein]

Thanks a lot for the detailed explanation, that explains a lot.

But this is still a bit more complicated I think:

> HA! I just remembered. All boot scripts in the PiDP-8/I contain the line "set df disabled"

Isn't that the fixed head disk device? Not quite sure why it get's disabled (device number conflict?) , but I don't think this has anything to do with the datafield switches or register.

Indeed, "Load Address" does copy IF and DF into the first LED row on my PiDP8i even with "set df disabled".

So why is the PiDP-8i behaving differently, and is it really intentional? I think the answer is in the following code snippet:

https://tangentsoft.com/pidp8i/file?name=src/pidp8i/main.c.in&ci=tip

Herer pPC is a pointer to the value of the emulated PC register, pM is a pointer to the emulated memory (always allocated to the max possible capacity).

============= [...] =============

    // Check for DEP switch press...
    static int swDep = 0;
    if (((switchstatus[2] & SS2_DEP) == 0) && (swDep == 0)) {
        uint16 sSR = (~switchstatus[0]) & 07777; // bit flip justified above
        *pPC = *pPC & 07777;  // sometimes high bits get set; squish 'em
[...]

        /* ??? in 66 handbook: strictly speaking, SR goes into AC,
           then AC into MB. Does it clear AC afterwards? If not, needs fix */
        pM[*pPC] = sSR;             // FIXME: shouldn't we use IF/DF here?
        *pMB = sSR;
        *pMA = *pPC & 07777;        // MA trails PC on FP; FIXME: OR in IF?
        *pPC = (*pPC + 1) & 07777;  // increment PC
        swDep = 1;                  // make it single-shot
    }

============[...]=============

So the authors were apparently, like me, unsure about the  role of the IF/DF (which we now cleared up, thanks!!), and opted to ignore the IF and DF values when depositing.

So I think this indeed could and should be fixed relatively easily.

HB

[Steve Tockey]

HB,

"Isn't that the fixed head disk device?"

You are correct. SIMH device DF is the DF32 fixed-head disk drive. I apologize for giving you wrong information.

"Not quite sure why it get's disabled (device number conflict?)"

I'm not sure why either. According to the latest SIMH PDP-8 manual (https://tangentsoft.com/pidp8i/uv/doc/simh/pdp8.pdf), DF does have device code conflicts with RF08 (RF) and RL8A (RL) but the default is RF08 enabled. DF would never be enabled unless explicitly enabled in the boot script.

"        /* ??? in 66 handbook: strictly speaking, SR goes into AC,

           then AC into MB. Does it clear AC afterwards? If not, needs fix */"

I don't have the 66 handbook. I only have the 67 handbook (Classic 8, 8/s), the 70 handbook (8/I, 8/L), and the 73 handbook (8/e, 8/m, 8/f). None of the handbooks I have say anything about SR going into MB via AC: page 93 in the 67 handbook, page 13 in the 70 handbook, and page 3-3 in the 73 handbook. And, having owned and extensively used both a Classic -8 and an -8/e I will swear that DEP leaves AC alone. When debugging machine code through the front panel, one often finds it necessary to DEP then resume execution. If DEP affected AC there would be no way to "pick up where you left off". How would you possibly ever restore the AC to the value it was before the DEP?

"So I think this indeed could and should be fixed relatively easily. "

I agree. As well, however, there is/was a problem regarding Memory Buffer (MB) in the 20210214 release (see https://groups.google.com/g/pidp-8/c/_y8UHCQnsY4). If that hasn't been fixed yet, I hope it would also be fixed soon.

Cheers,

-- steve

[timr...@gmail.com]

You are correct.  Deposit will not touch the AC.  And I don't remember if the MQ gets loaded from the AC after an OSR to read the switch register, but doubt it.

[Steve Tockey]

"And I don't remember if the MQ gets loaded from the AC after an OSR to read the switch register, but doubt it."

MQ does not get loaded from AC using OSR. OSR means "Or with Switch Register". It just does a bit-wise OR of the SR into the AC.

You need to use MQL ("MQ Load", 7421) to move from the AC into the MQ. MQA (7501) does a bit-wise OR of the MQ into the AC. SWP (7521) swaps the AC with the MQ.

[Rick Murphy]

Steve is right - a deposit does not alter the AC.  You can halt, deposit something, then hit continue and nothing should fail as a result.
This doesn't go through the AC to  memory - it's SR to MD and a write cycle. I'd have to go dig at schematics to be able to prove it, but console examine/deposit doesn't change CPU state.

    -Rick

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Rick Murphy, D. Sc., CISSP-ISSAP, K1MU/4, Annandale VA USA

[timr...@gmail.com]

Sorry, somehow my brain read MQ when the line said MB.  It sucks to get old.  :)

[Steve Tockey]

For some of us, "old" == "highly experienced in PDP-8s"   :^)

Still, MB would not be involved in OSR. MB is for memory read-write, OSR doesn't involve any memory read-write during instruction execution.

[timr...@gmail.com]

Well, it was in a post somewhere here.  And I like your thought on "highly experienced in PDP-8's over old".  But that does not change things really.

[HB Eggenstein]

I'd like to briefly come back to the initial topic: deposit/exam on fields other than the first 4096 words.

If I try this with the FPGA implementation that is described here https://groups.google.com/g/pidp-8/c/PNS6YyOCoAE/m/LNn0PVDsAgAJ  . it's actually the IF rather than the DF that selects the page for exam and deposit.

So it would be:

If you set the Switch Register to any

DIAAAA

where D is a Data Field, I is an Inst Field, and AAAA is a 4k memory address, both Exam and Dep will be reading and writing from extended memory address *IAAAA*, not DAAAA.

@Steve, how sure are you that your answer was correct? CAn someone double-check on their PDP-8i :-)?

Thanks

HB

[folke...@gmail.com]

If I try this with the FPGA implementation that is described here https://groups.google.com/g/pidp-8/c/PNS6YyOCoAE/m/LNn0PVDsAgAJ  . it's actually the IF rather than the DF that selects the page for exam and deposit.

 

I remember implementing this part of the circuit - the DF register is only used for indirect addressing. The field selection is done by a few gates that basically check if the CPU is executing a DEFER cycle and additionally checks that the instruction is not JMP or JMS - only then DF is chosen. This is how my VHDL code implements the circuit, it shows when the DF is active, when the IF is active and that there's an additional way to select the field through the external data break connection:

field <=

  mc8_df when (deferred = '1' and state = STATE_EXEC and inst /= INST_JMS and inst /= INST_JMP) else
  mc8_if when state /= STATE_BREAK and state /= STATE_COUNT and state /= STATE_ADDR else
  brk_data_ext when state = STATE_BREAK else
  "000"; 

I can also show you this in the actual schematic in the maintenance manual if you want, but maybe it's easier to quote the textual description from the maintenance manual, volume 2 - see attached screenshot from page 35.

You can test all of this by enabling the single stepping and single inst mode - it shows you how the field is activated when the EXEC and DEFER lamps are on.

@Steve, how sure are you that your answer was correct? CAn someone double-check on their PDP-8i :-)?

The FPGA implements the actual schematic - there can of course be some bugs introduced by my conversion, but in general, it should behave like a PDP-8/I because it's an implementation of the actual schematic from all the maintenance drawings. 

 

[HB Eggenstein]

Excellent, thanks for digging this up in the documentation, this really settles the question and I can submit a patch to OiDP-8i software.

THX again

HB

[Steve Tockey]

I will have to defer to Folke on this. The schematics have to be the ultimate authority. I am sure I read in the -8/I, -8/L Handbook that Dep used DF instead of IF but I can't find where I read it, anyway.

[Mike Katz]

I don't know about other models but the PDP-8/E uses the Instruction Field for Exam and Deposit.  I just tested this on my PDP-8/E and changing the Data Field does not affect Exam and deposit.

Here is the test I did.

SR = 0
EXTD ADDR LOAD (status lights show IF = 0, DF = 0)
DEPOSIT
ADDR LOAD
EXAM
MB = 0000

SR = 0007
EXTD ADDR LOAD (status lights show DF =  7,  IF = 0)
SR = 0000
ADDR LOAD
SR = 5252
DEPOSIT
SR = 0
ADDR LOAD
EXAM
MB = 5252

SR = 0070
EXTD ADDR LOAD (status lights show DF  0, IF = 7)
SR = 0000
ADDR LOAD
SR = 7070
DEPOSIT
SR = 0
ADDR LOAD
EXAM
MB = 7070
EXTD ADDR LOAD (status lights show DF=0, IF = 0)
ADDR LOAD
EXAM'
MB = 5252

Conclusive results on an actual PDP-8/E.

Can someone with a PDP-8/I do the same test and post their results, please.

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[folke...@gmail.com]

I found more evidence in the 8/E maintenance course [1], see the attached screenshot.

1: http://bitsavers.org/pdf/dec/pdp8/pdp8e/PDP8E_MaintCourseHandouts.pdf

[Mike Katz]

That handout is very informative.  Thank you very much.

On 11/4/2021 7:22 AM, folke...@gmail.com wrote:

I found more evidence in the 8/E maintenance course [1], see the attached screenshot.

1: http://bitsavers.org/pdf/dec/pdp8/pdp8e/PDP8E_MaintCourseHandouts.pdf

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[HB Eggenstein]

Thanks for the screenshot.

So I guess this patch should do the trick:

https://tangentsoft.com/pidp8i/vpatch?from=merge-in:01aa183fdab253c6&to=01aa183fdab253c6

Cheers

HB

[Steve Tockey]

HB, 

Yes, it appears to work for me based on a few simple tests. I will continue testing and let you know if I run into any problems.

Thanks,

-- steve