Question about BHALT_L line

[Paulo Rebordão]

Hi

In the process of getting my M8190 CPU board to start I'm making some progress.

Some background: I'm using a BA213 backplane and an ATX power supply.

Signals and control are provided by a circuit that I got from here: Qbus front panel

What happens is that sometimes it starts (diagnostic leds start to go through the testing sequence and the Run led on the front panel lights up), but frequently it doesn't.

I'm suspecting the problem lies on the BHALT line, as when it doesn't start the Leds display 77 (Halted).

My question is, for the CPU to start, should the BHALT line go and stay High ?

[Johnny Billquist]

The power signalling on the Qbus is more complicated than that.

Basically (from the description of the KDJ11-E):

5.6.3.3 Power-Up
The following events occur during a power-up sequence:

1. Logic associated with the power supply negates BDCOK H during
power-up and asserts BDCOK H 3 ms (minimum) after dc power is restored
to voltages within specification.

2. The processor asserts BINIT L after receiving nominal power and
negates BINIT L 0 ns (minimum) after the assertion of BDCOK H.

3. Logic associated with the power supply negates BPOK H during power-up
and asserts BPOK H 70 ms (minimum) after the assertion of BDCOK H. If
power does not remain stable for 70 ms, BDCOK H is negated. Therefore,
devices must suspend critical actions until BPOK H is asserted.

4. BPOK H must remain asserted for a minimum of 3 ms. BDCOK H must
remain asserted 4 ms (minimum) after the negation of BPOK H.


About BHALT, it says:

5.6.1 Halt
The assertion of BHALT L stops program execution and forces the
processor unconditionally into console ODT mode. The processor does not
assert the BHALT L bus line when it comes to a programmed halt.



Basically, BHALT usually just comes from the HALT button on the panel of
the BA box.

Johnny

On 2025-08-22 21:05, Paulo Rebordão wrote:
> Hi
>
> In the process of getting my M8190 CPU board to start I'm making some
> progress.
>
> Some background: I'm using a BA213 backplane and an ATX power supply.
> Signals and control are provided by a circuit that I got from here: Qbus

> front panel <https://avitech.com.au/?page_id=1657>

>
> What happens is that sometimes it starts (diagnostic leds start to go
> through the testing sequence and the Run led on the front panel lights
> up), but frequently it doesn't.
>
> I'm suspecting the problem lies on the BHALT line, as when it doesn't
> start the Leds display 77 (Halted).
> My question is, for the CPU to start, should the BHALT line go and stay
> High ?
>

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|| on a psychedelic trip
email: b...@softjar.se || Reading murder books
pdp is alive! || tryin' to stay hip" - B. Idol

[Johnny Billquist]

Just a little more on the power up sequence:

5.6.3 Power Status

Power status protocol is controlled by two signals, BDCOK H and BPOK H.
These signals are driven by an external device (usually the power
supply) and are defined in the following sections:

5.6.3.1 BDCOK H
The assertion of this line indicates that dc power has been stable for
at least 3 ms. Once asserted this line remains asserted until the power
fails.

5.6.3.2 BPOK H
The assertion of this line indicates that there is at least an 8 ms
reserve of dc power and that BDCOK H has been asserted for at least 70
ms. Once BPOK H has been asserted, it must remain asserted for at least
3 ms.
The negation of this line indicates that power is failing and that only
4 ms of dc power reserve remains. The negation of this line during
processor operation initiates a power-fail trap sequence.


Johnny

[Paulo Rebordão]

Another strange issue is the output I'm getting on the console.

After the diagnostics stop (the Led pattern stops at 56_8 and after a little while they start blinking), I get a long string of characters on the console, but it's garbage...

I have the switchpack set for 37400 (but tried other speeds too) but the console always gets garbage. Strangely the garbage always looks the same, even if I change the speed on the console side.

Console is set at 8,N,1 settings.

When I press enter or enter a character I always get more characters on the console, so "someone" seems to be listening on the other side...

Hardware issue with the board ?

[John Hudak]

The way I read the schematic, the Halt switch has two states, Halt and Enable.  For the CPU to continue through the boot sequence, the switch should be in the Enable state (Logic 1), e.g. not Halt.

The Halt line is pulled up to 5VDC via a pull-up resistor.  When the Halt switch is moved to the Halt position, it grounds (logic 0) the Halt line.  The schematic for the 11/03 front panel is attached and can be obtained through bit savers, as well as the 11/23 and 11/73  front panel schematics.  I could not remember/find the docs that show the timing diagrams that include the Halt signal.

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[Paulo Rebordão]

Thanks for the info. 

In the meantime, I used a multimeter to check BHALT at another slot and it was high. 

So it seems BHALT is not the issue. 

Paulo Rebordão

[Johnny Billquist]

A couple of comments. First of all, 37400??? What kind of speed is that?
I guess you mean 38400. But anyway...

First of all, beware that selecting the console speed can be done on two
different switchpacks, and they are sortof in parallel, so if you want
to use one specifically, the other one should be set to not mess you up
(can't remember exactly which way to set it). But it's a switchpack on
the CPU board itself, and a second on the distribution panel.

The LEDs on the CPU board match the numeric shown at the distribution
panel. And I don't understand what you mean by LED pattern "56_8". There
are only 6 LEDs on the board, numbered 0 to 5.

Johnny

> >> Qbus front panel <https://avitech.com.au/?page_id=1657 <https://

> avitech.com.au/?page_id=1657>>
> >>
> >> What happens is that sometimes it starts (diagnostic leds start
> to go
> >> through the testing sequence and the Run led on the front panel
> lights
> >> up), but frequently it doesn't.
> >>
> >> I'm suspecting the problem lies on the BHALT line, as when it
> doesn't
> >> start the Leds display 77 (Halted).
> >> My question is, for the CPU to start, should the BHALT line go and
> >> stay High ?
> >>
> >> --
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> >> utm_medium=email&utm_source=footer>.
> >
>
> --
> Johnny Billquist || "I'm on a bus
> || on a psychedelic trip
> email: b...@softjar.se || Reading murder books
> pdp is alive! || tryin' to stay hip" - B. Idol
>

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[John Hudak]

Given the (seemingly) randomness of a successful startup suggests a timing issue.  Do you have a 4 channel (or even a 2 channel) oscilloscope, or a logic analyzer to check the signals?  What is the condition of your backplane (dirty? haven't been used in a while?).  Might be worth cleaning the contacts with dioxit.  Perhaps exercise the dip switches on the board as they may be dirty. 

The article that you referenced seems like it is solid engineering and this suggests to me that this problem may be associated with your gear. Not sure of the AT power supply operational variations but perhaps sub in a different power supply?   A startup power surge drop could produce the same effect.  Maybe adjust the timing parameters in the arduino state machine?

[Paulo Rebordão]

Johnny, it was a typo. It's really 38400. 

I only have one switch pack as I don't have a panel. 

By 56_8 I mean octal 56.

5 on leds 3,4,5

6 on leds 0,1,2

The pattern is 011101, lsb to msb

Paulo Rebordão

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[Johnny Billquist]

On 2025-08-23 17:28, Paulo Rebordão wrote:
> Johnny, it was a typo. It's really 38400.

As I suspected then. :-)

> I only have one switch pack as I don't have a panel.

Ouch. That's unfortunate. So you have some special manufactured cable
for your console terminal? You are aware that the speed selection dips
on the distribution panel also come on that same connector on the CPU
board, so you are in fact also having your parallel speed selection
coming from two directions, even without the actual panel.

> By 56_8 I mean octal 56.
> 5 on leds 3,4,5
> 6 on leds 0,1,2
>
> The pattern is 011101, lsb to msb

LSB meaning the LED marked 0? Ok.
So that means you're at the "Exit standalone mode" stage.
Not sure what that means. But I think it would be good to figure out the
actual terminal speed at this point.

If your terminal is printing lots of characters, you are likely having
the terminal set at a much higher speed than the CPU is outputting
things at.

Johnny

>
>
> Paulo Rebordão
>
>
> A sábado, 23/08/2025, 16:23, Johnny Billquist <b...@softjar.se

> <mailto:b...@softjar.se>> escreveu:

> <mailto:b...@softjar.se> wrote:
> >
> >     Just a little more on the power up sequence:
> >
> >     5.6.3 Power Status
> >
> >     Power status protocol is controlled by two signals, BDCOK H
> and BPOK H.
> >     These signals are driven by an external device (usually the power
> >     supply) and are defined in the following sections:
> >
> >     5.6.3.1 BDCOK H
> >     The assertion of this line indicates that dc power has been
> stable for
> >     at least 3 ms. Once asserted this line remains asserted until
> the power
> >     fails.
> >
> >     5.6.3.2 BPOK H
> >     The assertion of this line indicates that there is at least
> an 8 ms

> >     reserve of dc power and that BDCOK H has beenasserted for at

> >      > processor unconditionally into console ODTmode. The processor

> >     does not
> >      > assert the BHALT L bus line when it comes to a programmed
> halt.
> >      >
> >      >
> >      >
> >      > Basically, BHALT usually just comes from the HALT button
> on the
> >     panel of
> >      > the BA box.
> >      >
> >      >   Johnny
> >      >
> >      > On 2025-08-22 21:05, Paulo Rebordão wrote:
> >      >> Hi
> >      >>
> >      >> In the process of getting my M8190 CPU board to start I'm
> making
> >     some
> >      >> progress.
> >      >>
> >      >> Some background: I'm using a BA213 backplane and an ATX power
> >     supply.
> >      >> Signals and control are provided by a circuit that I got
> from here:
> >      >> Qbus front panel <https://avitech.com.au/?page_id=1657

> <https://avitech.com.au/?page_id=1657> <https://
> > avitech.com.au/?page_id=1657 <http://avitech.com.au/?page_id=1657>>>

> >      >>
> >      >> What happens is that sometimes it starts (diagnostic leds
> start
> >     to go
> >      >> through the testing sequence and the Run led on the front
> panel
> >     lights
> >      >> up), but frequently it doesn't.
> >      >>
> >      >> I'm suspecting the problem lies on the BHALT line, as when it
> >     doesn't
> >      >> start the Leds display 77 (Halted).
> >      >> My question is, for the CPU to start, should the BHALT
> line go and
> >      >> stay High ?
> >      >>
> >      >> --

> >      >> You received this message because you aresubscribed to

> the Google
> >      >> Groups "[PiDP-11]" group.
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> >      >> utm_medium=email&utm_source=footer>.
> >      >
> >
> >     --
> >     Johnny Billquist || "I'm on a bus
> >     || on a psychedelic trip

> >     email: b...@softjar.se <mailto:b...@softjar.se> || Reading

> murder books
> >     pdp is alive! || tryin' to stay hip" - B. Idol
> >
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> --
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>                                    ||  on a psychedelic trip

> email: b...@softjar.se <mailto:b...@softjar.se>             ||

> Reading murder books
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>
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[Paulo Rebordão]

I have a 2 channel scope so tomorrow I'll take a look at lines BDCOK and BPOK

Paulo Rebordão