Drum type 23 and 24

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Angelo Papenhoff/aap

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Mar 9, 2026, 4:36:38 PM (9 days ago) Mar 9
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so now that i have the type 19 high speed channel more or less implemented i thought about looking into the drum.
schematics for the parallel type 23 and serial type 24 can be found here: https://bitsavers.org/pdf/dec/drum/

the issue is that the type 23, which bill has implemented, is actually only for the PDP-1D. this is significant because the 1D has no high speed channel because it has no memory, it has a memory bus (the same one that was later used on the pdp-6). and the drum accesses that memory directly without the PDP-1 knowing about it.
so putting a type 23 drum into the PiDP-1, which is a 1C, is a very strange thing to do historically. of course one could make it work with HSC instead of the memory bus, but with a rate of 8.5μs per word that seems dangerous given the 5μs cycle of the PDP-1.
the serial drum in comparison is much slower at 66.5μs per word.

so right now it's a bit unclear to me what to do. they are programmed differently but use the same IOT codes.
for historical accuracy i want the serial type 24 of course, but for compatibility with the test and bill's work i want the type 23.
what to do? perhaps implement the type 23 interface for PDP-1C with HSC and slow down the timing so the 1 and the drum don't trample on each others feet?

aap

Bill E

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Mar 9, 2026, 4:58:15 PM (9 days ago) Mar 9
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Interesting, there is mention in one of the manuals that the type 23 does use the hsc. I'll have to see where I found that. The 8.5 us cycle time was a real pain, since getting accurate timing with a 5us cycle time means I had to average over the number of words transferred and compute a fudge factor.

Also, the serial drum is *sloooow*!
Bill

Unibus

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Mar 9, 2026, 5:55:09 PM (9 days ago) Mar 9
to Angelo Papenhoff/aap, [PiDP-1]
Hi,

The Handbook and Price List for the PDP-1C list both the Type 23 and Type 24 Drums. I was wondering if the implementation on the PDP-1D was only because they had better funding. 

Unfortunately I can't look into this issue. I'm stuck on a legal case and I don't know if it is going to stop soon, or get much more complicated.

Regards,
Garry Page

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Angelo Papenhoff/aap

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Mar 9, 2026, 6:15:50 PM (9 days ago) Mar 9
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Oh good find! the price list mentions a type 23B drum. i wonder if this is a HSC-version of the type 23 perhaps?
interestingly sn #6 had a 4-channel HSC (see 00301_D_BS_1C-06-03_1of1.TIF) with:
chan 1: type 52 tape control
chan 2: type 246 drum
chan 3: type 340 display
chan 4: type 131 data control

and what is that type 246 drum there? and shouldn't the type 52 go through the DC? questions over questions...

Angelo Papenhoff/aap

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Mar 9, 2026, 8:51:21 PM (9 days ago) Mar 9
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There is a simple solution in the manual for the possible timing issue: if memory (or in our case the PDP-1C) misses a word, the drum just does a full revolution and tries again. while this is a 35ms penalty this means we're at least not dropping data. once i have it implemented it'll be interesting to see if it actually works well with the HSC or not.
i'm getting the impression that the PDP-1D/PDP-6 memory bus dance is rather similar to the HSC cycle, with the PDP-1C playing the role of a memory module.

Angelo Papenhoff/aap

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Mar 10, 2026, 3:49:58 PM (8 days ago) Mar 10
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After analyzing the timing in more detail i cannot imagine that the type 23 drum would have worked with a PDP-1C + HSC. The initial idea was to treat the PDP-1C + HSC essentially like a memory module on the bus as far as the drum is concerned, but that could only work with read OR write cycles. the drum needs read/write cycles however and i don't see how that could be done with the fixed 5μs cycle that we're dealing with. one could of course imagine a differently wired timing chain that can be stopped an restarted, which is pretty much what the PDP-1D/PDP-6 is doing.
so for emulation purposes i'm not entirely sure what to do here because the current code is built around the assumption of a fixed 5μs cycle. something that might work while keeping the illusion of real hardware somewhat intact would be to add a few extra μs/ns to the simulated time in the drum code to fake a stopped and restarted cycle in the machine. not quite what i had hoped for but maybe the best that i can do while not straying too far from what a 1C+HSC could have provided.

Bradford Miller

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Mar 10, 2026, 5:00:58 PM (8 days ago) Mar 10
to Angelo Papenhoff/aap, [PiDP-1]
So I’m curious. Were there any actual PDP-1C’s in the field with a type 23 drum, or is the type 23 drum what forced the development of the -1D once they realized the -1C couldn’t use it?

Angelo Papenhoff/aap

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Mar 10, 2026, 6:27:02 PM (8 days ago) Mar 10
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That is precisely what i would like to know. i seem to remember an interview with gordon bell (?) where he mentions the BBN timesharing system, the drum, the memory bus and so on. but now i can't find it. perhaps someone else has more luck with it. right now i really do suspect that the type 23 drum was exclusive to the 1Ds.

Bill E

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Mar 10, 2026, 7:48:45 PM (8 days ago) Mar 10
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From the Tye 23 manual I have: dated 1964:

Screenshot 2026-03-10 193846.png

I don't know when it came out. I think it was the successor to the serial drum, which was very slow and of less capacity. I also don't have full specs on the high speed channel hardware, but it seems that it could handle the parallel drum which had a word ready every 8,5us, because the HSC could cycle steal and I have some indication it could retain control for as long as it needed to transfer up to an entire track, but not sure about that. The stated number of words you could transfer per second only makes sense if it could, though. The Type 23 is listed in several of the handbook versions I have.

This is a good example of strictly correct vs just too useful to ignore, it's very easy to program and lets you store 32 full 4kword memory bank images. Several of the 1D instructions are also very convenient and reduce what would be 25usecs of what would take 3 instructions to one 5usec instruction.

Bill

Angelo Papenhoff/aap

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Mar 12, 2026, 8:01:36 PM (6 days ago) Mar 12
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page 51: "I did the original design of this magnificent drum for a PDP-1 that was a swapper so that in one cycle you could read a track and write the track into the memory and write memory onto another track simultaneously. This was by no means a trivial feat just because you had to synchronize the core with the slots on the drum and the slots or words had to be swapped."

exactly what i thought, and he confirmed it was specifically for timesharing on the 1D

in norbert's awesome pdp-1 spotting article (https://www.masswerk.at/nowgobang/2021/pdp1-spotting) he linked this, which is also a very good peek into the PDP-1 culture: http://www.walden-family.com/bbn/bbn-print2.pdf

Bill E

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Mar 13, 2026, 7:10:54 AM (6 days ago) Mar 13
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Interesting. I'll pass this on.. Amazing that DEC would put so much work into something that had such limited demand.

Also, check the mechanical specifications, especially the head height above the drum surface. There's some impressive engineering there.

Bill


Angelo Papenhoff/aap

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Mar 14, 2026, 9:13:20 AM (5 days ago) Mar 14
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There was a lot of interest in timesharing on a PDP-1 and that really needs a fast drum. BBN #45 also had a big fastrand drum from univac for mass storage.
what's interesting is that the peripherals were mostly built for specific customers. in that interview it becomes clear that the UART that we all know and love is really the sibling of the 256 channel break system. gordon bell designed them both at the same time for ITT's computerized torn-tape system. only one of them went on to become famous. this of course makes me want to implement that thing now haha

Bill E

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Mar 14, 2026, 1:19:53 PM (5 days ago) Mar 14
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The amusing thing about the fastrand was it would have been better named slowrand. Its best feature apparently was the drum bearings failing and the drum breaking through the casing and through the nearest wall.
The wall feature was apparently fixed in a later version.
Bill
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