Bug in pidp1 emulator?

[Bill E]

I recompiled pong from the source in tape/source, and it hangs.

Debugging, it appears that:

dpy-i

iot i

hangs forever. The bare iot is supposed to be a 'wait for complete' of dpy.

It never completes, just hangs on the iot.

Playing with the source, just

dpy

also seems to hang forever.

I deleted the bare iots, and changed the bare dpy to dpy-i and pong runs fine.

Any clues?

Bill

[Matthias Barthel]

Bill,

I'am not sure if there any "wire" exists from the dpy device to the pdp1, the display must send a completition signal when dpy -i is used. I think the dpy only sends the calculated point to the display emulation , and when we use dpy -i it hangs forever when nothing comes back ...

For more brainfog its to early here (3:51 am) 😵‍💫

Matthias 

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[Norbert Landsteiner]

It kind of depends on what "dpy" is: DEC defines this in the basic documentation as "720007", while Macro has this with the i-bit already set, as in "730007".

Generally, the operations are detailed in "PDP-1 Input-Output Systems Manual (Preliminary Manual)", http://www.bitsavers.org/pdf/dec/pdp1/F25_PDP1_IO.pdf

 
TABLE I

In-Out Transfer       Wait for Completion Pulse     Enable/Disable-
Command Bits          for Restart/Continue          Completion (Done
5         6           without wait                  Pulse Signal
––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––

0         0           Continue, no wait             Disable
0         1           Continue, no wait             Enable
1         0           Wait, then continue           Enable
1         1           Wait, then continue           Disable


   Bits 5 of the in-out transfer command designates whether the program
is to wait for a completion pulse before continuing. The exclusive
or of bits 5, 6 of the command specify whether the completion pulse
return signal is to be enabled or disabled.

The version with the i-bit set is generally assumed the default mode, as we also read there (referring to a code example):

The only case not included above, but mentioned in Table I, is the case of bits 5 and 6 both zero. Here, the program does not halt the and the completion pulse of the device is enabled. Thus, the program must only refrain from giving the display commands too frequently.

The technique of inhibiting completion is used when several devices are operating concurrently. The inhibit command completion is used with the sequence break system.

(So, the assumption seems to be that a completion pulse will be used, except in cases where a conflict may arise from addressing multiple devices asynchronously.)

"PDP-35-2 / PDP-1 Instruction Manual / Part 3 -- iot Operated I/O Devices" (DEC, Sep 1971), https://archive.org/8/items/bitsavers_mitrlepdp1_894137/pdp35-2_sep71.pdf, provides the following general information on the instruction format:

The dpy instruction (73cb07) causes one point to be displayed on the scope. (...) The three "b" bits control the brightness -- 4 is visible to photomultiplier tubes only, 7 is barely visible in a dark room, 0 is normal, and 3 is brightest. The "c" bits control the centering. 0 makes the origin in the center of the scope. 1 puts it at a the center of the bottom edge. 2 makes the origin be half way up the left edge, while 3 puts it at the lower left corner.

A dpy (that is with the i-bit on) takes 50 microseconds to complete. dpy-i (iot 7) does not wait for the scope to complete. Since it is impossible to activate the scope too fast, one normally executes iot 7 instructions. This allows the program to continue while the scope is running.

"iot i", AKA "ioh", on the other hand, is fairly  unambiguous, as in "730000".

So, when assembling source code, be sure what "dpy" actually means, 720007 or 730007. If it's for Macro or macro1.c, it's probably 730007.

But keep in mind that the request of a completion pulse is actually a function of XOR of bits 5 (i) and 6.

So,

720007     dpy-i      ;display at intensity 0 with origin at lower left corner, no completion pulse, no wait

730000     iot i      ;ioh – wait for completion pulse (never requested!)

should indeed hang.

Best,

Norbert

[Norbert Landsteiner]

Oops,

make this

720007     dpy-i      ;display at intensity 0 with origin at center, no completion pulse, no wait

730000     iot i      ;ioh – wait for completion pulse (never requested!)

-- Norbeet

[Bill E]

Thanks for the analysis. From this, the source of pong as distributed is non-functional, which means the binary version has to be from different sources, unless of course macro1 has different behavior for assembling those symbols than macro, and the binary was produced by macro. I used macro1 to assemble.

Bill

[Bill E]

Ok, the generated code in macro1 for dpy-i 300 is 720307, so yes, clearly no completion pulse would ever be generated. I should have spotted that, it was late. (And now it's early!)

Definitely bad source code in the distribution.

Bill

[Norbert Landsteiner]

> From this, the source of pong as distributed is non-functional, which means the binary version has to be from different sources (…)

I think, this was demo code for the MiSTer FPGA PDP-1 core – and, as far as I'm aware (I'm not really familiar with this), this may be to be lacking in faithfully recreating the entire display logic. (E.g., there is a high-speed mode, where "dpy" displays without any delays or latency and there aren't any limits to what amount of dots can be displayed realistically. Which suggests that completion pulses aren't essential and some liberties may have been taken.)

However, I believe, the Pong program was run on the CHM PDP-1, at least, it was listed as one of the modern paper tapes, they have there. But I'm not familiar with any results, or if there had been additional tweaking involved.

– Norbert