[PIC] exceeding ADC input impedance on 16f886
Forrest W Christian
16f886. Among other functions, I need to be able to read the 'raw'
input voltage to the circuit. Today I do this with a 10K/1K 1% voltage
divider into an ADC pin (with appropriate protection diodes). With the
3.3V Vdd I run the circuit at, this gives me something like 36V max vin,
and a maximum power consumption of just under 1/8 watt 'burnt' across
both resistors. Not ideal, but it works.
I am now having to modify this design to operate on up to just under
60VDC. This means I have to adjust a voltage divider. using 10K and
560 ohms would put me in the right range... but because of the E*E part
of ohms law, I'm now burning just over 1/3W across the resistors... not
acceptable.
In an ideal world, I'd just do a 100K and 5.6K... unfortunately the
'minimum' input impedance is 10K on the 'f886.
I would prefer to avoid adding a opamp or other buffer. I remember some
discussion that you can actually get away with violating the input
impedance spec, especially if you add a input capacitor. Since this is
a DC source, can I just do the 100K and 5.6K and say put a .1uF cap on
the input pin? What am I traiding off. Other ideas?
And no, I don't have the budget/board real-estate for a opamp... even
though that's probably the right answer.
-forrest
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Bob Blick
On Sun, 13 Jun 2010 18:33:12 -0600, "Forrest W Christian" said:
>
> In an ideal world, I'd just do a 100K and 5.6K... unfortunately the
> 'minimum' input impedance is 10K on the 'f886.
I think you mean "maximum"??
Remember your Thevenin equivalents - the source impedance will be the
same as the parallel resistance of the two resistors, in this case just
over 5K.
So you don't have a problem, if the 10k figure is right, I don't have
the datasheet in front of me, and the value is different on different
parts..
>
> I would prefer to avoid adding a opamp or other buffer. I remember some
> discussion that you can actually get away with violating the input
> impedance spec, especially if you add a input capacitor. Since this is
> a DC source, can I just do the 100K and 5.6K and say put a .1uF cap on
> the input pin? What am I traiding off. Other ideas?
Having too-high source impedance does two things that hurt the accuracy.
First, the sampling capacitor needs to charge from the source, second is
input bias current. By adding a cap you fix the problem of the sampling
capacitor but it doesn't fix the input bias current, so your error is
usually skewed toward mid-scale.
Cheerful regards,
Bob
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PICdude
> ...
> In an ideal world, I'd just do a 100K and 5.6K... unfortunately the
> 'minimum' input impedance is 10K on the 'f886.
> ...
The input impedance spec is what the PIC "sees", and here, that will
be 100K || 5.6K (parallel), which is about 5.3K, assuming your
measured voltage has a low impedance. (An *ideal* voltage source has
zero ohms). So you're good.
AFAIK, you can exceed the input impedance spec, but the A/D conversion
time goes up. I've not heard of the 0.1uf for exceeding impedance
before, but my guess is that it's there to reduce noise, as higher
resistances are more susceptible to noise.
Cheers,
-Neil.
ivp
> In an ideal world, I'd just do a 100K and 5.6K... unfortunately the
> 'minimum' input impedance is 10K on the 'f886.
People have reported using much higher impedances than Microchip
recommend, with a longer sampling time, without affecting results too
badly. I'd suggest you try it and see. I've needed to sample up 55V
in the past but had an op-amp to buffer the divider, as you'd probably
do if you could
RussellMc
So you can use 10k to ground and whatever is needed to input and end up
slightly under 10k.
(Z ~+ Rin x 10k/(Rin + 10k))
As Joe says, one factor is leakage current
http://ww1.microchip.com/downloads/en/DeviceDoc/41291F.pdf
fig 8.8 page 90 shows ADC block diagram.
500 nA nominal leakage in 10k gives 500E-9 x E4 = 5 mV offset or about 1 bit
at 5V full range with 10 bit converter.
YCMV.
Table 17.5, page 251 shows leakage currents of 0.1 uA typical and +/- 1 uA
max so the figures above could be 2 bits worst case and 0.1 bit typical
across full rated temperature range. ie at a typical temperature range a
typical IC would typically be well under 1 bit error in 10 bits with 10k
input.
ADC discussion around page 100 gives acceptable timings - without digging
further 1.6 uS looks like minimum ADC cycle time. If you cycled ADC REALLY
fast you'd start to get ADC holding capacitor charge time issues if you
exceeded 10k input Z but odds are this will be secondary to bias offset as
above in real cases.
As Joe says - try it and see.
Take a power supply of known voltage, connect a say 100k pot in series to
ADS pin and measure voltage with PIC. Try this at say 1 25 50 75 99 % of
full scale voltage. That plus a range of Zins and you'd get a fair feel of
how it behaved.
BUT - 10k to ground + any input R should be OK :-)
Russell McMahon
Olin Lathrop
> I am now having to modify this design to operate on up to just under
> 60VDC. This means I have to adjust a voltage divider. using 10K and
> 560 ohms would put me in the right range.
>
>
> unfortunately the 'minimum' input impedance is 10K on the 'f886.
The 10Kohm spec sounds right, but then your proposed voltage divider makes
no sense. That will have a output impedence of 10Kohms // 560ohms = 530
ohms, which is 18.9 times lower than necessary. Or put another way, you
could multiply your resistors by 18.9 and get a divider that has 10Kohms
output impedence. That would be 187Kohms and 10.6Kohms. At 60V in that's
only 18mW dissipated in the divider.
Another trick you can do to minimize power dissipation is to switch the
input to the divider on only when needed. A high side P channel FET switch
with pullup on the gate would keep everything off and dissipating no power
unless you actively drive the gate low. You only need it on for maybe 10-20
uS before starting the A/D conversion.
********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
(978) 742-9014. Gold level PIC consultants since 2000.
Olin Lathrop
> AFAIK, you can exceed the input impedance spec, but the A/D conversion
> time goes up.
No. Source impedence has nothing at all to do with the A/D conversion time
since the source is decoupled from the sampling capacitor then.
A high source impedence will charge the sampling capacitor more slowly,
which you can compensate for by lengthening the acquisition time. The other
reason for low source impedence is to tolerate some A/D pin leakage without
altering the voltage the A/D sees by more than 1 LSB. Longer acquisition
time won't fix that.
********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
(978) 742-9014. Gold level PIC consultants since 2000.
PICdude
> PICdude wrote:
>> AFAIK, you can exceed the input impedance spec, but the A/D conversion
>> time goes up.
>
> No. Source impedence has nothing at all to do with the A/D conversion time
> since the source is decoupled from the sampling capacitor then.
Maybe you're using A/D conversion time to mean just the time that the
A/D converter is working/calculating (after the sampling cap is
charged). I mean it to be the total time the code needs to get a
valid sample (though your definition is probably correct). With a
higher impedance, the sampling cap will take longer to come up to
sampled voltage, hence increasing the total time required to get an
A/D value.
> ...
Jan-Erik Soderholm
On 2010-06-14 16:43, PICdude wrote:
> Quoting Olin Lathrop<olin_p...@embedinc.com>:
>
>> PICdude wrote:
>>> AFAIK, you can exceed the input impedance spec, but the A/D conversion
>>> time goes up.
>>
>> No. Source impedence has nothing at all to do with the A/D conversion time
>> since the source is decoupled from the sampling capacitor then.
>
> Maybe you're using A/D conversion time to mean just the time that the
> A/D converter is working/calculating (after the sampling cap is
> charged). I mean it to be the total time the code needs to get a
> valid sample (though your definition is probably correct). With a
> higher impedance, the sampling cap will take longer to come up to
> sampled voltage,
Which is the "acquisition time". The conversion time comes after that.
Michael Watterson
> Quoting Olin Lathrop <olin_p...@embedinc.com>:
>
>
>> PICdude wrote:
>>
>>> AFAIK, you can exceed the input impedance spec, but the A/D conversion
>>> time goes up.
>>>
>> No. Source impedence has nothing at all to do with the A/D conversion time
>> since the source is decoupled from the sampling capacitor then.
>>
>
> Maybe you're using A/D conversion time to mean just the time that the
> A/D converter is working/calculating (after the sampling cap is
> charged). I mean it to be the total time the code needs to get a
> valid sample (though your definition is probably correct). With a
> higher impedance, the sampling cap will take longer to come up to
> sampled voltage, hence increasing the total time required to get an
> A/D value.
>
>
>
current might be more than 1/2 bit error. Longer A/D time won't fix it.
So with say 100K source impedance there is an unknown error, as the
leakage current varies from part to part and with temperature and supply
volts. Some parts may be OK at 15K source impedance at a given temp and
volts. It's not an exact figure, thus you can't compensate.
Obviously there are limits on conversion time too, relating to source
impedance, but you can't fix the leakage current issue with longer
conversions.
Olin Lathrop
> Maybe you're using A/D conversion time to mean just the time that the
> A/D converter is working/calculating (after the sampling cap is
> charged).
Yes, as does the PIC datasheet. Microchip is careful to differentiate
between acquisition time and conversion time. Sometimes, particularly in
the dsPIC documentation, they call it sampling as apposed to acquisition
time. You start a conversion by ending sampling.
********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
(978) 742-9014. Gold level PIC consultants since 2000.
Olin Lathrop
> Obviously there are limits on conversion time too, relating to source
> impedance,
No, there are not, as I already replied to Neil (which you quoted).
Conversion time has nothing at all to do with input impedance. The sampling
capacitor is disconnected from the input during conversion.
********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
(978) 742-9014. Gold level PIC consultants since 2000.
Michael Watterson
> Michael Watterson wrote:
>
>> Obviously there are limits on conversion time too, relating to source
>> impedance,
>>
>
> No, there are not, as I already replied to Neil (which you quoted).
> Conversion time has nothing at all to do with input impedance. The sampling
> capacitor is disconnected from the input during conversion.
>
what you say. You are use conversion time in a more narrow sense.
Olin Lathrop
> You are use conversion time in a more narrow sense.
To avoid confusion, I use it the same as the PIC data sheets.
Michael Watterson
> Michael Watterson wrote:
>
>> You are use conversion time in a more narrow sense.
>>
>
> To avoid confusion, I use it the same as the PIC data sheets.
>
>
Microchip quote in that detail is only part of the process. Some of us
have designed A/D systems for years without ever being near a PIC.
Olin Lathrop
> But that creates confusion to people designing the system.
It shouldn't confuse those that are familiar with successive approximation
A/Ds. All of those I've seen sample, then hold, then convert the held
value. Other A/D technologies work differently, of course. Sigma-delta,
for example, essentially sample and convert at the same time.
Forrest W Christian
I thought the impedance had to do with charge time of the capacitor
inside the unit during acquisition.
Ignoring the power dissipation in the resistors, I'm being told that the
following pairs, are all within spec:
1M/10K
100K/1K
10K/100ohm
1K/10ohm
100ohm/1ohm.
I would have guessed that the top one is going to charge the capacitor a
lot slower than the bottom one.... but I'm starting to think that
perhaps they are all equivalent? Did I miss/forget something in my
electronics training?
-forrest
Bob Blick
On Mon, 14 Jun 2010 13:07:56 -0600, "Forrest W Christian" said:
> Ok, could someone help me out here...
>
> I thought the impedance had to do with charge time of the capacitor
> inside the unit during acquisition.
>
> Ignoring the power dissipation in the resistors, I'm being told that the
> following pairs, are all within spec:
>
> 1M/10K
> 100K/1K
> 10K/100ohm
> 1K/10ohm
> 100ohm/1ohm.
>
> I would have guessed that the top one is going to charge the capacitor a
> lot slower than the bottom one.... but I'm starting to think that
> perhaps they are all equivalent? Did I miss/forget something in my
> electronics training?
Certainly it would charge a capacitor faster, but in the case of the
PIC, you only need to meet the minimum spec, which allows up to 10K
impedance.
Cheerful regards,
Bob
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Olin Lathrop
> I thought the impedance had to do with charge time of the capacitor
> inside the unit during acquisition.
That's one of the effects. The other, as has been pointed out plenty
already on this thread, is the offset voltage that is caused by the pin
leakage current times the source impedance.
> Ignoring the power dissipation in the resistors, I'm being told that
> the following pairs, are all within spec:
>
> 1M/10K
> 100K/1K
> 10K/100ohm
> 1K/10ohm
> 100ohm/1ohm.
Yes, as they all have a output impedance less than 10K ohms. Each of these
divides the input voltage by 101, then presents that to the A/D. The output
impedence of each of these dividers is the parallel combination of the two
resistors. For example, 1Mohm // 10Kohm = 9.90Kohms, which is the output
impedance of the top divider in your list above.
> I would have guessed ...
Don't guess, know. If you're not sure, look it up.
> that the top one is going to charge the
> capacitor a lot slower than the bottom one.... but I'm starting to
> think that perhaps they are all equivalent? Did I miss/forget
> something in my electronics training?
Apparently. Look up something called "Thevenin equivalent".
William "Chops" Westfield
On Jun 14, 2010, at 12:07 PM, Forrest W Christian wrote:
> 1M/10K
> :
> 100ohm/1ohm.
>
> I would have guessed that the top one is going to charge the
> capacitor a
> lot slower than the bottom one.... but I'm starting to think that
> perhaps they are all equivalent? Did I miss/forget something in my
> electronics training?
They're not equivalent. The top one has an impedance slightly less
than 10k ohms, and the bottom one has an impedance slightly less than
1 ohm. So the top one will charge a cap "a lot slower" than the
bottom one. It's just that "most" of the voltage charging the cap
will come from the 10k leg of the circuit, "plus" a little bit from
the 1M leg, so it's equivalent to less than 10k overall...
http://en.wikipedia.org/wiki/Th%C3%A9venin%27s_theorem
BillW
RussellMc
> following pairs, are all within spec:
>
> 1M/10K
> 100K/1K
> 10K/100ohm
> 1K/10ohm
> 100ohm/1ohm.
>
> I would have guessed that the top one is going to charge the capacitor a
> lot slower than the bottom one.... but I'm starting to think that
> perhaps they are all equivalent? Did I miss/forget something in my
> electronics training?
A lot slower is correct BUT "fast enough to meet spec" is the aim.
Examples 2 to 5 are lower than needed - which is fine.
You can have eg 0.1V fed in through 10k in series, OR 50v fed in
through 490k with 10k to ground.
In both cases you see 0.1V at the pin. In the second case the
impedance is SLIGHTLY lower as it is 10k in parallel with 10k.
In the initial case, input current is 0.1V/10k = 10 uA.
In the 2nd case input current is (50-0.1)/500k ~= 10 uA.
So the higher resistance is matched by a higher voltage to get the
same voltage at the PIC pin . and 'it all balances out'.
In example1, for a given PIC ADC input capacitor, which is only going
to be charged to 0.1V in this example, the large input resistance is
offset by the large input voltage which can be accepted. All the other
examples provide MORE input current than is needed.
Russell McMahon
Bob Ammerman
>
> On Mon, 14 Jun 2010 13:07:56 -0600, "Forrest W Christian" said:
>> Ok, could someone help me out here...
>>
>> I thought the impedance had to do with charge time of the capacitor
>> inside the unit during acquisition.
>>
>> Ignoring the power dissipation in the resistors, I'm being told that the
>> following pairs, are all within spec:
>>
>> 1M/10K
>> 100K/1K
>> 10K/100ohm
>> 1K/10ohm
>> 100ohm/1ohm.
>>
>> I would have guessed that the top one is going to charge the capacitor a
>> lot slower than the bottom one.... but I'm starting to think that
>> perhaps they are all equivalent? Did I miss/forget something in my
>> electronics training?
>
> Certainly it would charge a capacitor faster, but in the case of the
> PIC, you only need to meet the minimum spec, which allows up to 10K
> impedance.
>
>
> Cheerful regards,
>
> Bob
If I understand it correctly there are actually two different things which
limit the maximum allowable source impedance for the A/D converter on a PIC:
1: Acquisition time - the higher the source impedance the longer the
acquisition time. If this were the only constraint you could have a much
higher source impedance if you were willing to wait long enough for the
sampling capacitor to charge up. But, ....
2: Leakage current - there is a certain amount of leakage current in the A/D
that will 'load' your source. If the source impedance is too high then this
leakage will 'pull' it away from the correct value by more than 1 LSbit of
the converted value. This problem won't go away no matter a) how long you
wait to acquire the voltage, or b) what capacitance you add to the input to
reduce noise.
-- Bob Ammerman
RAm Systems
Mark Rages
I've tried exceeding the 10k impedance before and had a problems with
noisy readings. Lower impedance made it all better.
I think the 10k rating is there for a reason. It is an inconvenient
spec and I'm sure Microchip would revise it if the workaround was as
simple as a longer acquisition time.
Regards,
Mark
markrages@gmail
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Midwest Telecine LLC
mark...@midwesttelecine.com
Oli Glaser
--------------------------------------------------
From: "Mark Rages" <mark...@gmail.com>
Sent: Monday, June 14, 2010 10:58 PM
To: "Microcontroller discussion list - Public." <pic...@mit.edu>
Subject: Re: [PIC] exceeding ADC input impedance on 16f886
AFAIK, most ADCs have similar or lower impedance driving requirements, so
10k seems pretty reasonable to me and the "inconvenience" can be dealt with
easily using a buffer, which is recommended anyway for best performance and
least noise, and then a low pass filter can be used in between to isolate
and prevent ringing etc (but I understand in this case the OP can't use one
due to space restriction). The stand alone 35Msps ADC I'm using at the
moment requires <80 ohm source impedance at full speed/full scale steps.
Forrest W Christian
Taking what everyone (well mostly Olin) said, and playing with thevenin:
Assuming 24VDC in, I listed several values... .using the thevenin
equations, I come up with for the following values:
1M/10K = equivalent to 0.24V source + 9.9kohm resistor
100K/1K = equivalent to 0.24V source + 990 ohm resistor
10K/100 = equivalent to 0.24V source and 99 ohm resistor
I see now what is going on... the resistor divider network behaves
identically to a lower-voltage source and a resistor equal to 1/ ((1/Rt)
+ (1/Rb))
Thanks... this definitely helps... probably need to spend some time
playing on a protoboard to prove I understand it fully to myself, but I
think I get it in any case.
PICdude
> ...
> I see now what is going on... the resistor divider network behaves
> identically to a lower-voltage source and a resistor equal to 1/ ((1/Rt)
> + (1/Rb))
> ...
I haven't used Thevenin in ages, but I tend to think of this as an
ideal voltage source (in this case the voltage you're measuring) which
has a zero-ohm impedance, so for impedance calcs, the positive point
of the measured voltage is at essentially connected to ground. Hence
the parallel-resistor calc.
Cheers,
-Neil.
Marechiare
> I've tried exceeding the 10k impedance before and had
> a problems with noisy readings. Lower impedance made
> it all better.
The problem was with your design. You could have achieved less noisy
readings with just proper design.
> I think the 10k rating is there for a reason.
Sure it is. And the reason(s) was/were pointed out numerous times in
this thread.
> It is an inconvenient spec and I'm sure Microchip would
> revise it if the workaround was as simple as a longer
> acquisition time.
It was pointed out many times already that the workaround was not "as
simple as a longer acquisition time".
Re-read specs, please (pay attention to "pin leakage specs" phrase):
***
MidRange Docs
Section 23. 10-bit A/D Converter
Note 3: The maximum recommended impedance for analog sources is 10 k.
This is required to meet the pin leakage specification.
***