8085 Microprocessor Data Bus

[Jarrell Campbell]

Thebus organization of the 8085 microprocessor is the way in which the microprocessor communicates with other devices in a computer system. The 8085 microprocessor has a 16-bit address bus, an 8-bit data bus, and various control signals that are used to manage data transfer and other operations.

The address bus is used to specify the memory location or device with which the microprocessor wants to communicate. It is 16 bits wide, which allows the microprocessor to address up to 64K bytes of memory. The address bus is unidirectional, which means that data can only flow in one direction from the microprocessor to the addressed device.

The data bus is used to transfer data between the microprocessor and other devices. It is 8 bits wide, which means that data can be transferred in byte-sized chunks. The data bus is bidirectional, which means that data can flow in either direction between the microprocessor and other devices.

In addition to the address and data buses, the 8085 microprocessor has various control signals that are used to manage data transfer and other operations. These control signals include the read (RD), write (WR), and hold (HLDA) signals, among others. The RD and WR signals are used to control data transfer to and from memory or other devices, while the HLDA signal is used to indicate that the microprocessor is in a hold state and cannot execute instructions.

Bus is a group of conducting wires which carries information, all the peripherals are connected to microprocessor through Bus. Diagram to represent bus organization system of 8085 Microprocessor. Why use Bus organization in 8085 microprocessor ?

It is a group of conducting wires which carries address only.Address bus is unidirectional because data flow in one direction, from microprocessor to memory or from microprocessor to Input/output devices (That is, Out of Microprocessor). Length of Address Bus of 8085 microprocessor is 16 Bit (That is, Four Hexadecimal Digits), ranging from 0000 H to FFFF H, (H denotes Hexadecimal). The microprocessor 8085 can transfer maximum 16 bit address which means it can address 65, 536 different memory location. The Length of the address bus determines the amount of memory a system can address.Such as a system with a 32-bit address bus can address 2^32 memory locations.If each memory location holds one byte, the addressable memory space is 4 GB.However, the actual amount of memory that can be accessed is usually much less than this theoretical limit due to chipset and motherboard limitations.

The data bus is an 8-bit bidirectional bus that is used to transfer data between the microprocessor and other components such as memory and I/O devices. It is used to carry data to or from the memory or input/output devices.

It is a group of conducting wires which carries Data only.Data bus is bidirectional because data flow in both directions, from microprocessor to memory or Input/Output devices and from memory or Input/Output devices to microprocessor. Length of Data Bus of 8085 microprocessor is 8 Bit (That is, two Hexadecimal Digits), ranging from 00 H to FF H. (H denotes Hexadecimal). When it is write operation, the processor will put the data (to be written) on the data bus, when it is read operation, the memory controller will get the data from specific memory block and put it into the data bus. The width of the data bus is directly related to the largest number that the bus can carry, such as an 8 bit bus can represent 2 to the power of 8 unique values, this equates to the number 0 to 255.A 16 bit bus can carry 0 to 65535.

The control bus is a bidirectional bus that is used to carry control signals between the microprocessor and other components such as memory and I/O devices. It is used to transmit commands to the memory or I/O devices for performing specific operations.

It is a group of conducting wires, which is used to generate timing and control signals to control all the associated peripherals, microprocessor uses control bus to process data, that is what to do with selected memory location. Some control signals are:

Flexibility: The bus organization used in the 8085 microprocessor allows it to communicate with a wide range of devices. This flexibility makes it well-suited for use in a variety of computer systems, including embedded systems, personal computers, and other devices.

Modularity: The bus organization makes it easy to add or remove devices from a computer system. This modularity allows system designers to customize the system to meet the needs of specific applications.

Scalability: The bus organization used in the 8085 microprocessor is scalable, which means that it can be used in systems of varying sizes and complexity. This scalability makes it well-suited for use in systems that require a wide range of performance levels.

Low Cost: The bus organization used in the 8085 microprocessor is relatively simple and inexpensive to implement. This makes it an attractive option for low-cost, embedded applications.

Latency: The bus organization can introduce latency, which is the delay between the time a command is issued and the time the response is received. This latency can be a problem in real-time applications that require immediate responses.

Data Integrity: The bus organization used in the 8085 microprocessor is vulnerable to data corruption due to electromagnetic interference and other sources of noise. This can lead to errors in data transmission and processing.

Complexity: The bus organization used in the 8085 microprocessor can be complex to implement and troubleshoot, which can increase the cost and time required to develop and maintain computer systems.

A microprocessor is a multipurpose, programmable, clock-driven, register-based electronic device that reads binary instructions from a storage device called memory, accepts binary data as input and processes data according to those instructions and provide results as output. A 8085 microprocessor, is a second generation 8-bit microprocessor and is the base for studying and using all the microprocessor available in the market.

It is software-binary compatible with the more-famous Intel 8080 with only two minor instructions added to support its added interrupt and serial input/output features. However, it requires less support circuitry, allowing simpler and less expensive microcomputer systems to be built.

The 8085 is supplied in a 40-pin DIP package. To maximise the functions on the available pins, the 8085 uses a multiplexed address/data (AD0-AD7) bus. However, an 8085 circuit requires an 8-bit address latch, so Intel manufactured several support chips with an address latch built in. These include the 8755, with an address latch, 2 KB of EPROM and 16 I/O pins, and the 8155 with 256 bytes of RAM, 22 I/O pins and a 14-bit programmable timer/counter. The multiplexed address/data bus reduced the number of PCB tracks between the 8085 and such memory and I/O chips.

Both the 8080 and the 8085 were eclipsed by the Zilog Z80 for desktop computers, which took over most of the CP/M computer market, as well as a share of the booming home-computer market in the early-to-mid-1980s.

The 8085 had a long life as a controller, no doubt thanks to its built-in serial I/O and five prioritized interrupts, arguably microcontroller-like features that the Z80 CPU did not have. Once designed into such products as the DECtape II controller and the VT102 video terminal in the late 1970s, the 8085 served for new production throughout the lifetime of those products. This was typically longer than the product life of desktop computers.

The 8085 is a conventional von Neumann design based on the Intel 8080. Unlike the 8080 it does not multiplex state signals onto the data bus, but the 8-bit data bus is instead multiplexed with the lower eight bits of the 16-bit address bus to limit the number of pins to 40. State signals are provided by dedicated bus control signal pins and two dedicated bus state ID pins named S0 and S1. Pin 40 is used for the power supply (+5 V) and pin 20 for ground. Pin 39 is used as the Hold pin.

The processor was designed using nMOS circuitry, and the later "H" versions were implemented in Intel's enhanced nMOS process called HMOS II ("High-performance MOS"), originally developed for fast static RAM products.[3] Only a single 5-volt power supply is needed, like competing processors and unlike the 8080. The 8085 uses approximately 6,500 transistors.[4]

The 8085 has extensions to support new interrupts, with three maskable vectored interrupts (RST 7.5, RST 6.5 and RST 5.5), one non-maskable interrupt (TRAP), and one externally serviced interrupt (INTR). Each of these five interrupts has a separate pin on the processor, a feature which permits simple systems to avoid the cost of a separate interrupt controller. The RST 7.5 interrupt is edge triggered (latched), while RST 5.5 and 6.5 are level-sensitive. All interrupts except TRAP are enabled by the EI instruction and disabled by the DI instruction. In addition, the SIM (Set Interrupt Mask) and RIM (Read Interrupt Mask) instructions, the only instructions of the 8085 that are not from the 8080 design, allow each of the three maskable RST interrupts to be individually masked. All three are masked after a normal CPU reset. SIM and RIM also allow the global interrupt mask state and the three independent RST interrupt mask states to be read, the pending-interrupt states of those same three interrupts to be read, the RST 7.5 trigger-latch flip-flop to be reset (cancelling the pending interrupt without servicing it), and serial data to be sent and received via the SOD and SID pins, respectively, all under program control and independently of each other.

SIM and RIM each execute in four clock cycles (T states), making it possible to sample SID and/or toggle SOD considerably faster than it is possible to toggle or sample a signal via any I/O or memory-mapped port, e.g. one of the port of an 8155. (In this way, SID can be compared to the SO ["Set Overflow"] pin of the 6502 CPU contemporary to the 8085.)

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