What you need to do the job:
* ASIC/FPGA verification experience
* VHDL/Verilog knowledge
* Simulation experience
* C/C++
* Test bench creation experience
* Unix Perl Tcl
* Strong debugging skills
* BS degree in EE (or equivalent)
* Excellent written and verbal communication skills
Pluses:
* Co-verification experience
* Ability/desire to design ASICs/FPGAs
* Board level debug experience
* MS degree (or equivalent)
* Embedded processor experience
* System verification ModelSim experience
If you think you've got what it takes to make it work - let us know!
We are located in Pittsburgh, PA and we are looking for you! Come and
join the team!
If you are interested in this or other positions of this sort, please
send your resume to:
Jennifer Herrmann
Scientific Placement, Inc.
jher...@scientific.com
Please email your resume to jher...@scientific.com in plain ascii text
format (refer to JO# JO60848JJH in your response) or fax to the number
listed below.
To help us expedite our response, please include information on your current
salary status and expectations. If you'd like to be considered for other
positions similar to the one described above, please provide input on
relocation preferences in the U.S.
Scientific Placement staff members are knowledgeable specialists in niche
technology job markets (Multimedia, E-Commerce, Networking/Telecom, Games,
Embedded Systems, Hardware, and platforms that include: Macintosh, Windows,
and Unix).
We can provide advice on resume quality, salary levels, and the demand
for certain skills. Scientific Placement enjoys a national reputation
for professionalism, competence, and ethics. Our clients are scattered
nationwide and clustered wherever there is a high technology developer
community. Fees are employer paid. For additional information, please
visit our web site.
Jennifer Herrmann
Scientific Placement, Inc.
P. O. Box 19949
Houston, Texas 77224-9949
(281) 496 6100
(281) 496 0373 Fax
jher...@scientific.com