---------- Forwarded message ----------
From:
Vijay Holimath <vijayh...@pes.edu>Date: Wed, Aug 5, 2015 at 9:46 AM
Subject: Design Engineer Position
To: "Dr. Chandar.TS PESIT ECE" <
chan...@pes.edu>, "Dr.V.K Agrawal" <
vk.ag...@pes.edu>
Hello Sir,
We have immediate requirement of a BE Male candidate (not MTech or not internship candidates) who completed the degree. He should best in digital circuit design, verilog coding skills and have rich experience in FPGA. If you have the best candidates in your team, we will be glad to consider them.
Thanks,
-Vijay