Hello All,
I just realized that M0 is stack based. M0 is dedicated to use the least op to do the work, it's extreme makes it being stack based, not register based. If the latter is more advanced, then it's a retrogression. Here is some compares:
M0:
set_imm I0, 0, 123
set_imm I1, 0, 356
add_i I2, I1, I0
jvm-ish:
push I0, 123
push I1, 123
add I2, I1, I0
> I just realized that M0 is stack based. M0 is dedicated to use the least op to do the work, it's extreme makes it being stack based, not register based. If the latter is more advanced, then it's a retrogression. Here is some compares:
>
> M0:
> set_imm I0, 0, 123
> set_imm I1, 0, 356
> add_i I2, I1, I0
> CPU-ish:
> mov %eax, 123
> add %eax, 356
> or
> add %eax, %ebx
> or
> add %eax, [0] # [0] is memory unit.
> or
> add [0], %eax # [0] is memory unit.
>
> In M0, we can't do this:
> add_i I2, 123, 356
I have thought it would be nice if M0 had some concept of addressing modes. Indirect, indexed, and immediate are things that jump to mind quickly. They could be handled by the core runloop before dispatching off to the ops for simplicity.
~~ Benabik
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The big goal of M0 is stupid simplicity, but I also don't want
meaningfully efficient execution to require an optimizing assembler.
Adding addressing modes isn't out of the question.
I'm busier than I should be at the moment, but I'd love to see an
experiment with addressing modes. If either of you have the time,
please feel free to fork the m0 branch and hack out something on
the Perl interpreter. This kind of experimentation is exactly
what it's for.
Christoph
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