perf events support on omap4

[Gabi Voiculescu]

Hi.

I am wondering if there is support to run perf events on omap4 processors. I get an error about registering irq3 in Linux when enabling perf events. As such, perf events aren't working.

I know the current kernel supports the Performance Monitoring Unit built in the Cortex-A9 MPU, but I can't seem to find a reference telling me if what Interrupt Controller IRQ line(s) signal overflow in the Performance Monitoring Unit of the OMAP4, neither in code nor in public TRM (I have looked at version T and V).

For example, in case of the OMAP3, the PMU was using IRQ3 (BENCH).


As I see it omap4 ubuntu 10.10 perf events support was limited at some point to just using software events. I am wondering if they fixed it, in the mean time.


Is anybody working this problem? Is there a patch for omap4 available?


Thank you,
Gabi Voiculescu

[Måns Rullgård]

Gabi Voiculescu <boy3...@yahoo.com> writes:

> Hi.
>
> I am wondering if there is support to run perf events on omap4
> processors. I get an error about registering irq3 in Linux when
> enabling perf events. As such, perf events aren't working.
>
> I know the current kernel supports the Performance Monitoring Unit
> built in the Cortex-A9 MPU, but I can't seem to find a reference
> telling me if what Interrupt Controller IRQ line(s) signal overflow in
> the Performance Monitoring Unit of the OMAP4, neither in code nor in
> public TRM (I have looked at version T and V).

The PMU events are reported through the cross-trigger module and thus
use the CTI interrupts. The details on how to configure the
cross-trigger module have thus far eluded me.

> For example, in case of the OMAP3, the PMU was using IRQ3 (BENCH).
>

> Is anybody working this problem? Is there a patch for omap4 available?

Apparently not. I've been asking for this for quite some time to no avail.

--
Måns Rullgård
ma...@mansr.com

[Gabi Voiculescu]

There seem to be a couple of patches out there that make this support work, at least for part of the counters in the PMU. There is some magic CTI programming in there to associate TRIGIN 1 via channel 2 of CTi with TRIGOUT 6. The magic is the choice of TRIGIN 1 as the input trigger coming from the PMU.

What I can't say now is if CTI forwards the cycle counter too.

I have not played with this too much so I can't say if there/what are issues with it.

See this set of 4 patches: http://www.mail-archive.com/linux...@vger.kernel.org/msg45757.html

All I gather is that there is a problem with this patch and linaro-2.6.39, that prevented this support from going mainstream kernel.org.

Gabi

---

From: Måns Rullgård <ma...@mansr.com>
To: panda...@googlegroups.com
Sent: Sat, July 30, 2011 11:42:02 PM
Subject: Re: [pandaboard] perf events support on omap4