Hi Rob,
> in theory you should just set MEMTYPE_BO for descs[0]/descs[1], and
> that gets converted into the correct tiled typed on the kernel side.
> It's possible there is something wrong in omapdce kernel part, I think
> we have mostly not used 2d buffers yet w/ omapdce recently so it is
> possible for there to be some bug.
On further review, this doesn't appear to really be related to H264
specifically - I am unable to get the YUV buffers to rotate at all,
nothing to do with DCE.
I assume that the YUV buffers must also be tiled to be rotated, so I'm
allocating them with omap_bo_new_tiled (there are two planes in the
YUV, Y & UV, so Y is widthxheightx8bpp, and UV is width * 0.5 x height
* 0.5 x 16bpp). However when I call drmModeSetPlane the kernel panics:
[ 61.050109] ------------[ cut here ]------------
[ 61.056152] WARNING: at arch/arm/mach-omap2/omap_l3_noc.c:117
l3_interrupt_handler+0x110/0x174()
[ 61.065399] L3 custom error: MASTER:DSS TARGET:DMM2
[ 61.070556] Modules linked in:
[ 61.073760] Backtrace:
[ 61.076354] [<c00126d4>] (dump_backtrace+0x0/0x118) from
[<c04b838c>] (dump_stack+0x20/0x24)
[ 61.085266] r6:c05e66b7 r5:00000075 r4:c06b9e40 r3:00000002
[ 61.091278] [<c04b836c>] (dump_stack+0x0/0x24) from [<c003c378>]
(warn_slowpath_common+0x5c/0x74)
[ 61.100616] [<c003c31c>] (warn_slowpath_common+0x0/0x74) from
[<c003c44c>] (warn_slowpath_fmt+0x40/0x48)
[ 61.110626] r8:c00315bc r7:000000c8 r6:00000180 r5:00080003 r4:f8000200
[ 61.117523] r3:00000009
[ 61.120300] [<c003c40c>] (warn_slowpath_fmt+0x0/0x48) from
[<c00316cc>] (l3_interrupt_handler+0x110/0x174)
[ 61.130493] r3:c06f2478 r2:c05e6707
[ 61.134277] [<c00315bc>] (l3_interrupt_handler+0x0/0x174) from
[<c0089134>] (handle_irq_event_percpu+0xbc/0x294)
[ 61.144989] r7:0000002a r6:e6900d80 r5:c06bc140 r4:e6900d80
[ 61.151000] [<c0089078>] (handle_irq_event_percpu+0x0/0x294) from
[<c0089358>] (handle_irq_event+0x4c/0x6c)
[ 61.161285] [<c008930c>] (handle_irq_event+0x0/0x6c) from
[<c008c224>] (handle_fasteoi_irq+0xd8/0x124)
[ 61.171081] r6:ffffffff r5:c06bc194 r4:c06bc140 r3:00000000
[ 61.177062] [<c008c14c>] (handle_fasteoi_irq+0x0/0x124) from
[<c0088a30>] (generic_handle_irq+0x30/0x40)
[ 61.187072] r5:00000000 r4:0000002a
[ 61.190856] [<c0088a00>] (generic_handle_irq+0x0/0x40) from
[<c000f184>] (handle_IRQ+0x88/0xc8)
[ 61.200042] r4:0000002a r3:0000021a
[ 61.203796] [<c000f0fc>] (handle_IRQ+0x0/0xc8) from [<c0008658>]
(gic_handle_irq+0x48/0x6c)
[ 61.212615] r5:c06b9f40 r4:fa240100
[ 61.216400] [<c0008610>] (gic_handle_irq+0x0/0x6c) from
[<c000dd80>] (__irq_svc+0x40/0x70)
[ 61.225128] Exception stack(0xc06b9f40 to 0xc06b9f88)
[ 61.225128] 9f40: 55d75555 fe404000 e5943010 fe404000 00000002
00000000 c07243c0 c0f7b1c0
[ 61.225158] 9f60: 8000406a 412fc09a 00000000 c06b9f94 c06b9f74
c06b9f88 c0024eb8 c000f4a8
[ 61.225158] 9f80: a0000113 ffffffff
[ 61.225158] r5:a0000113 r4:c000f4a8
[ 61.225189] [<c000f474>] (default_idle+0x0/0x3c) from [<c000f888>]
(cpu_idle+0xbc/0x120)
[ 61.225189] [<c000f7cc>] (cpu_idle+0x0/0x120) from [<c04a85ac>]
(rest_init+0x7c/0x94)
[ 61.225219] [<c04a8530>] (rest_init+0x0/0x94) from [<c0663838>]
(start_kernel+0x2c4/0x318)
[ 61.225219] r4:c06da560 r3:c0698d98
[ 61.225219] [<c0663574>] (start_kernel+0x0/0x318) from [<80008044>]
(0x80008044)
[ 61.225250] ---[ end trace 1b75b31a2719ed1f ]---
Has anyone had any luck using tiled YUV buffers?
Regards,
Andre