The ROM code really doesn't differentiate between address blocks. It doesn't know if it's in the lower 8K, RAM, ROM, the RIOT, etc.. But the quickest way I can think of to verify it would be to create a quick program to calculate a checksum. The other way would be to create a kind of hex dump using the ROM paper tape punch routine to dump the ROM content.
Have you tried doing something "beefy" with the RAM card like loading the in-RAM version of BASIC?
Also, have you set the NMI and IRQ vectors in RAM? Nothing should be kicking off an interrupt, but if it does it is going to get pointed someplace random if they aren't set.
I'm looking at the code in the monitor. It uses indirect indexed addressing to point to the memory location being modified. That means that if there were issues with Page Zero memory, things would get flaky. But I'm struggling to think of anything that would match the symptoms. The fact that the problem goes away when you pull the RAM chip makes me suspect an addressing conflict is happening and both memory chips are trying to put data on the data bus at the same time. But even if that was happening, it seems like both would get the write and be trying to put the same data back so the impact would be minimal (or catastrophic--this is so predictable, not random).
Something going on around the DEN line on the RAM card could cause strange behavior.
Actually one thing that could cause strange behavior would be if pins 4 and 5 on U2 (the 74LS00) had a solder bridge or if pin 4 wasn't soldered. That would mean that the phi 2 clock wouldn't be checked. The fact that the address mode loads an address from page zero and adds the y register to it means the timing for that may look a lot different than just an LDA ADDR and STA ADDR. (This would be an issue that went away when the RAM chip was pulled also.)
I guess that is the other thing that would probably be worth trying a test program--store a known value in memory and then use LDA (addr),Y to load the value and save it off someplace else and then STA (addr),Y to write a second value. It is really rare to have a problem that shows up only in certain address modes, but it isn't unheard of.
Thanks,
Jim W4JBM