Timer interrupt line 6530 vs 6532?

[Kande Laber]

In the 6530-Manual [1] under "Interval timer" the following is written: "... During Read or Write operation address line A3 controls the interrupt capability of PB7, i.e. A3 = 1 enables IRQ on PB7 ...".

I do not find anything comparable regarding PB7 in the 6532-Manual [2].

PB7 is e.g. used in the "Clock"-Project on p. 52 ff of [3] to drive the NMI line.

Question: Can the "Clock" project be built with the PAL-1, which has a 6532?

[1] http://retro.hansotten.nl/uploads/riot653x/mos_6530_riot.pdf
[2] http://retro.hansotten.nl/uploads/riot653x/mos_6532_riot.pdf
[3] http://retro.hansotten.nl/uploads/files/The%20First%20Book%20of%20KIM.pdf

[Kande Laber]

Meanwhile, I found it myself. With the 6532 you have to use the /IRQ line and in the case of the PAL-1 this is already hooked up to the /IRQ of the 6502.
To run the 'clock' example from [3] you just set the IRQ vector instead of the NMI vector. With this the clock runs.
In other words: The timer section of the 6532 behaves a little different than the timer section of the 6530.

[Jim McClanahan]

That is interesting. Now you have me curious if it might be possible to write a new serial driver that would use interrupts and a buffer instead of the 'put things on hold and watch for a character' approach in the current ROM. Having Ctrl-C work in BASIC would be nice...

Thanks,

Jim W4JBM

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[Stefan S]

There is one more difference to not not timer but port related, the 6532 does not share PB6 with a chip select there for the 6532 offers a fully working 8 Bit Port not a 7 Bit one.

[GN Liu]

Worth reading:  http://retro.hansotten.nl/6502-sbc/6530-6532/6530-replacement-kim-1/

[Kande Laber]

Yes,. Thanks a lot for the hint.
There I read "... The next difference is the fact that the 6532 has a separate IRQ and PB7 line. As we will see, the functionality of both lines is the same as with the 6530. To create the same circumstances we only have to connect them together.".
IMHO and in the case of the PAL-1 this is not out-of-the-box, i.e. this "feature" has to be implemented by the user if needed.
Is that true?

[Stefan S]

Yes, but as /IRQ and PB7 work independent you could configure PB7 as output and when simply connecting them I don't know how they behave if one output is driven to high and the other output is driven to low.

I think the outcome differs if it is an NMOS or CMOS chip.

As KIM-1 and also PAL-1 are intended for makers, the knowledge about this little differences is what counts, bridging, swapping or connecting of two signals should not be a big deal to their owners.

[Hans Otten]

The CMOS and NMOS version of the 6532 are identical (minus a one count difference in the timer according the datasheets).
PAL-1s and KIM-1s all use the NMOS variant, the CMOS variant is very rare.

To use IRQ on the KIM-1  /PAL-1/2 is up to the user. The line is there on the expansion connector, the ICs IRQ lines are connected. Nothing in the KIM-1 monitor uses interrupts.

Connecting PB7 to IRQ is possible. But beware, other IRQ sources will fight with PB7 as output  as PB7 not an open collector line. Limit to PB7 only or insert  an open collector port in between. 

[Kande Laber]

As stated previously I could make a running "clock" using the IRQ vector. However, if you would like to run the clock in the background ("key 1" feature) this does not work because the BIOS uses a "SEI" command in line $1E9C and this will mask the IRQ and the clock will stop. Therefore, I connected Pins 17 und 21 of the expension port and set the NMI vector accordingly (see picture). With this I got the full featured clock of the "First Book of Kim"- project.1E9C

[Kande Laber]

As /IRQ and PB7 are separate with the 6532 you can build a working "First-Book-of-KIM-1"-Clock with a working beeper without a second RIOT. Of course it needs some code modification.