PAL-2 onboard expansion decoding review

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GN Liu

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Jan 13, 2023, 8:50:06 PM1/13/23
to PAL 6502 computer
Hello community,

Here is the address decoding design for PAL-2, thanks to Hans' previous review, here is the updated design.

The onboard decoding circuit primarily for the "BIG" RAM used by the PAL-2, and it also allows you to configure the RAM as an unexpanded KIM-1 (1K RAM) and the 8K selector capabilities for other applications.

If you have time, please help me review the circuit or post your better ideas on the top address lines decoding.

Thank you all,
&
Happy healthy new year!

Liu 

IMG_3025.jpg
IMG_3026.jpegIMG_3028.jpeg

Jim McClanahan

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Jan 14, 2023, 10:01:09 AM1/14/23
to GN Liu, PAL 6502 computer
Looks good and feels like a "modernization" that makes sense.

If you are able to disable the "mirroring" of the bottom 8K at the top, the existing expansion ROM code could all be moved up to the upper 16K with the right reset/interrupt vectors in the upper 6 bytes (pointing to the lower ROM). I don't know of anything other than maybe a couple of exercises in the various books that needs memory to be mirrored like it is. In that configuration you'd have the traditional 8K at the bottom, then 40K of RAM, then 16K of new ROM (with the upper 6 bytes point to the right addresses in the lower 8K). The reality is that you can't really use the upper 8K as RAM unless you do some trickery around handling the reset vector.

The flexibility you have to map in the RAM would be nice. I used a RAM chip in my ROM breadboard tests because it let me upload and test code without burning a new ROM every time.

I like the way it looks!

Thanks,
Jim W4JBM

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Hendrik-Jan Megens

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Jan 14, 2023, 2:26:00 PM1/14/23
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Hi Liu,

that first PAL-2 incarnation really looks GREAT! I don't think I have anything concrete I could offer on decoding or circuitry. The only point to emphasise from my side is that I believer there is real merit in making sure that every snippet of code, even if trivial examples from '70s books (or maybe ESPECIALLY those) will work as if it were a real KIM-1. If you want to expand on the KIM-1 functionality, maybe that could be achieved by specific jumper settings that keep the PAL-2 'backward compatible' to the KIM-1. 

Looking forward to the final design. 

Cheers,
Hendrik-Jan

GN Liu

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Jan 16, 2023, 10:25:59 AM1/16/23
to PAL 6502 computer
Hi Jim,

You definitely pointed out the key. It would be hard to use the top 8K as RAM. I think we could remove the switch for the onboard RAM and mirror select and just use the DIP switch to select mirroring the top 8K or leave the top 8k to the expansion port. 

If someone want to configure a KIM-1 system with maximum memory, they could use an extra 74145 connected to the top 8K decode pin, and just waste 1K RAM space for the vector as described in the KIM-1 user manual. But this is just my imaginary case, I don't know if there are programs that can use all the RAM with this configuration.

Thanks,
Liu

GN Liu

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Jan 16, 2023, 10:31:31 AM1/16/23
to PAL 6502 computer
Hi Hendrik-Jan,

Glad you (and Jim) like the PAL-2 look!

It will be fully compatible with KIM-1, because it's a KIM-1 clone SBC ;)
I'll post the updates in the group, maybe slow these days as the Chinese new year is coming.

Thanks,
Liu
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