Hello everyone,
I started using KiCAD a cpl od weeks ago bcos I joined an electric engineering degree.
I understand the learning curve of gigantic software like this is steep.
I would like to start leaning how to setup a simple BJT_bias simulation.
I would love to thank you and i appreciate the fact that you took the time to re-produce the circuit and successfully run a simulation on KiCAD however, i have no idea what you did or how and i cant learn from it so that i can start experimenting with it myself.
Would you be so kind to, briefly, explain what you did and how?
Many thanks in advance
The next is the type of PSU. The PSU is connected between the gate and the collector and thus no current can flow.
You can use two PSU as @ML9104 has done (one for gate-emitter, one for collector-emitter) or you can use one and bias the gate from this common PSU
I would love to thank you and i appreciate the fact that you took the time to re-produce the circuit and successfully run a simulation on KiCAD however, i have no idea what you did or how and i cant learn from it so that i can start experimenting with it myself.
Would you be so kind to, briefly, explain what you did and how?
so, I am getting excited now because finally i can see something (although completely wrong with no understanding of what i am doing wrong).
I put aside the BJT simulation for a little while and decided to reproduce the circuit and simulation on the tutorial i was following earlier.
I remember at a lector on LTSpice simulation at UNI that we need to add some kind of data-sheet to each compnent (similarly to how we edit values of resistors and capacitors etc.). Is this what the error is trying to tell me now? If so, how/where do I add those data-sheet?
p.s.: i recall that when i installed KiCAD 6 i had some small issues with directory installations and paths and I had to manually set them to the right place. However, for some reason I have a symbols directory and a library directory. Should i move all the files.sym in the library directory (or viceversa) and then reset it correctly in paths? or this is not really making any sense and I will still have to add manually the data-sheet for certain components?
We have a need for xrun to exit during the simulation step of our system verilog design when an error occurs. The error we want to exit on is generally from an assertion (*E,ASRTST) but also could be from a $error in the verilog. The solution seemed to be upgrading the error to a fatal using -xmfatal ASRTST, but this seems to only elevate errors that occur during compile or elaboration, but not in the simulate step. Are there any other methods of getting an error to cause the simulator to exit? the only other solution we've found is to change $error to $fatal, but this doesn't seem like a good long term solution as the code that will generate the error is not maintained by us.
There is also a -errormax switch, also used at simulation time, which causes the simulator to exit after N errors, regardless of the mnemonic code for the error; this owuld be a more generic solution than using -xmfatal.
Thanks for the reply. The command I'm using to run the simulation is 'xrun -xmfatal ASRTST fil1.sv' does this not pass the -xmfatal through to simulation? Do I need to run the simulation as a separate command, I'm assuming xmsim, though I've never used it before.
I tried again doing xrun -elaborate then xmsim -xmfatal with no luck. I checked the xmsim.args file and there is a -xmfatal when I run the xrun command, however my error is still not being elevated to fatal.
Okay so this time I face another problem but not sure how to go about it. So I been trying to do a noise simulation using the simulation toolkit based on the rectifier example from the official simulation demos. However my attempts so far using different example still result a simulation failures when I try to do noise analysis. Would appreciate any tips on how I can proceed here on topic of noise analysis.
Unfortunately noise simulation is not yet implemented in KiCad/Eeschema. The tabs that indicate availability should have been made invisible. For each noise simulation ngspice creates four vectors in addition to the standard output vectors: inoise_total, onoise_total (each a single integral value), and inoise_spectrum, onoise_spectrum (to be plotted versus frequency). These vectors have to be printed or saved in addition to the standard vectors. This is not yet done in Eeschema, so the output data are not available.
You also have to prepare your input file for noise analysis. The ngspice warning messages tell us: The input source v1 needs a dc and an ac value. So you should add the terms DC 0 AC 1 to the VSOURCE values.
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