Baremetal

[Quoocs Huwng]

Hi everyone, 

I'm looking to run Baremetal with OpenPiton to load firmware file onto the KC705 board. But I don't know where to start along and how debugging with OpenOCD?

Thanks!

[Tianrui Wei]

Hi,

There's https://github.com/tianrui-wei/openpiton/tree/kc705 for kc705 support. You can also reference the following openocd configuration file (and tweak based on documentation). It was a long time ago so I'm not sure which things should be uncommented and which things should not. You can also reference the kc705 schematics online and see what's going on.

```

adapter driver ftdi
adapter speed 100
transport select jtag

# From Digilent support:
# The SRST pin is [...] 0x20 and 0x10 is the /OE (active low output enable)


ftdi_device_desc "Digilent Adept USB Device"
ftdi_vid_pid 0x0403 0x6010
# channel 1 does not have any functionality
ftdi_channel 0
# just TCK TDI TDO TMS, no reset
#
ftdi_layout_init 0x0088 0x008b
reset_config none

#set _CHIPNAME riscv
#jtag newtap fpga_unused tap -irlen 6 -expected-id 0x33651093
#jtag newtap $_CHIPNAME cpu -irlen 6 -expected-id 0x14B79093
#
#set _TARGETNAME $_CHIPNAME.cpu
#target create $_TARGETNAME riscv -chain-position $_TARGETNAME
#
#
#riscv set_ir idcode 0x9249
#riscv set_ir dtmcs 0x22924
#riscv set_ir dmi 0x23924

set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 6 -expected-id 0x33687093

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -chain-position $_TARGETNAME

riscv set_ir idcode 0x9
riscv set_ir dtmcs 0x22
riscv set_ir dmi 0x23

```

Thanks,

Tianrui

[Quoocs Huwng]

Thank you very much, Tianrui. I've used your repo before. 

What I want to ask is whether the Openpiton platform provides tools to run Baremetal loading firmware file compiled from C code on FPGA instead of reloading the bitstream?  And is there any support for debugging code with OpenOCD for openpiton?

Thanks,

Hung

Vào lúc 10:04:56 UTC+7 ngày Thứ Ba, 7 tháng 5, 2024, tianr...@berkeley.edu đã viết:

[Jonathan Balkind]

You have to manage it yourself but yes. You can change the zsbl in Ariane to loop infinitely before it jumps to 0x80000000. Then you connect the JTAG via openocd to gdb. In gdb you load the program to 0x80000000 then change the core's PC.

I think part of this is explained in the readme.

Thanks,

Jon

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[Quoocs Huwng]

Thank Jon, 

I have installed and followed the instructions to execute OpenOCD in the README. But i get error when i run : openocd -f fpga/ariane.cfg

This is command:

# prefer to use sba for system bus access
riscv set_prefer_sba off

How to fix this Error? Thanks.

Vào lúc 23:34:29 UTC+7 ngày Thứ Ba, 7 tháng 5, 2024, jbal...@ucsb.edu đã viết:

[Jonathan Balkind]

Hopefully someone else might have some suggestions (maybe khoatm98 on github if you look at the recent issues). I haven't ever been very deeply familiar with how openocd works.

Thanks,

Jon

To view this discussion on the web, visit https://groups.google.com/d/msgid/openpiton/7202a342-40cf-4a67-80d0-3535e9a1b4ffn%40googlegroups.com.