Hi,
I tried to follow along the instruction on github but got the following error when running:
sims -sys=manycore -ariane -decoupling -vcs_build -x_tiles=3 -y_tiles=1 -config_rtl=MINIMAL_MONITORING
Following is the log. Thanks. Victor
[centos@ip-172-31-60-148 openpiton]$ sims -sys=manycore -ariane -decoupling -vcs_build -x_tiles=3 -y_tiles=1 -config_rtl=MINIMAL_MONITORING
sims -sys=manycore -ariane -decoupling -vcs_build -x_tiles=3 -y_tiles=1 -config_rtl=MINIMAL_MONITORING
sims: ====================================================
sims: Simulation Script for OpenPiton
sims: Modified by Princeton University on June 9th, 2015
sims: ====================================================
sims: ====================================================
sims: Simulation Script for OpenSPARC T1
sims: Copyright (c) 2001-2006 Sun Microsystems, Inc.
sims: All rights reserved.
sims: ====================================================
sims: start_time Mon Mar 13 03:21:55 UTC 2023
sims: running on ip-172-31-60-148.ec2.internal
sims: uname is Linux ip-172-31-60-148.ec2.internal 3.10.0-1160.88.1.el7.x86_64 #1 SMP Tue Mar 7 15:41:52 UTC 2023 x86_64 x86_64 x86_64 GNU/Linux
sims: version 2.0
sims: dv_root /home/centos/workspace/openpiton/piton
sims: model_dir /home/centos/workspace/openpiton/build
sims: tre_search /home/centos/workspace/openpiton/piton/tools/env/tools.iver
sims: using config file /home/centos/workspace/openpiton/piton/tools/src/sims/sims.config (-DFLIST_ARIANE -DFLIST_DCP)
sims: Building/running for rv64
sims: using random seed 0
sims: network_config not specified, assuming 2dmesh configuration
sims: Setting UART_DIV_LATCH to 0xb
sims: creating model directory /home/centos/workspace/openpiton/build/manycore/rel-0.1
/home/centos/workspace/openpiton/piton/design/chipset/axi_lite_slave_rf/rtl/Flist.axi_lite_slave_rf
/home/centos/workspace/openpiton/piton/design/chipset/io_ctrl/rtl/Flist.io_ctrl
/home/centos/workspace/openpiton/piton/design/chipset/io_xbar/components/rtl/Flist.components
/home/centos/workspace/openpiton/piton/design/chipset/io_xbar/dynamic/rtl/Flist.dynamic
/home/centos/workspace/openpiton/piton/design/chipset/io_xbar/common/rtl/Flist.common
/home/centos/workspace/openpiton/piton/design/chipset/io_xbar/rtl/Flist.io_xbar
/home/centos/workspace/openpiton/piton/design/chipset/noc_axilite_bridge/rtl/Flist.noc_axilite_bridge
/home/centos/workspace/openpiton/piton/verif/env/common/fake_mem_ctrl.flist
/home/centos/workspace/openpiton/piton/verif/env/manycore/manycore.flist
/home/centos/workspace/openpiton/piton/design/chip/chip_bridge/rtl/Flist.chip_bridge
/home/centos/workspace/openpiton/piton/design/common/fpga_bridge/fpga_rcv/rtl/Flist.fpga_rcv
/home/centos/workspace/openpiton/piton/design/common/fpga_bridge/fpga_send/rtl/Flist.fpga_send
/home/centos/workspace/openpiton/piton/design/common/fpga_bridge/rtl/Flist.fpga_bridge
/home/centos/workspace/openpiton/piton/design/chipset/rtl/Flist.chipset
/home/centos/workspace/openpiton/piton/design/chip/tile/l2/rtl/Flist.l2
/home/centos/workspace/openpiton/piton/design/chip/tile/dynamic_node/sim/rtl/Flist.sim
/home/centos/workspace/openpiton/piton/design/chip/tile/dynamic_node/dynamic/rtl/Flist.dynamic
/home/centos/workspace/openpiton/piton/design/chip/tile/dynamic_node/components/rtl/Flist.components
/home/centos/workspace/openpiton/piton/design/chip/tile/dynamic_node/common/rtl/Flist.common
/home/centos/workspace/openpiton/piton/design/chip/tile/dynamic_node/rtl/Flist.dynamic_node
/home/centos/workspace/openpiton/piton/design/chip/tile/dmbr/rtl/Flist.dmbr
/home/centos/workspace/openpiton/piton/design/chip/tile/common/srams/rtl/Flist.srams_common
/home/centos/workspace/openpiton/piton/design/chip/tile/common/rtl/Flist.network_common
/home/centos/workspace/openpiton/piton/design/chip/tile/common/rtl/Flist.sw_mem_common
/home/centos/workspace/openpiton/piton/design/chip/tile/common/rtl/Flist.ucb_common
/home/centos/workspace/openpiton/piton/design/chip/tile/common/rtl/Flist.dft_common
/home/centos/workspace/openpiton/piton/design/chip/tile/common/rtl/Flist.dlib_common
/home/centos/workspace/openpiton/piton/design/chip/tile/common/rtl/Flist.clib_common
/home/centos/workspace/openpiton/piton/../maple/rtl/Flist.dcp
/home/centos/workspace/openpiton/piton/design/chip/tile/ariane/Flist.ariane
/home/centos/workspace/openpiton/piton/design/chip/tile/l15/rtl/Flist.l15
/home/centos/workspace/openpiton/piton/design/chip/tile/rtap/rtl/Flist.rtap
/home/centos/workspace/openpiton/piton/design/chip/tile/rtl/Flist.tile
/home/centos/workspace/openpiton/piton/design/chip/jtag/rtl/Flist.jtag
/home/centos/workspace/openpiton/piton/design/chip/pll/rtl/Flist.pll
/home/centos/workspace/openpiton/piton/design/chip/rtl/Flist.chip
/home/centos/workspace/openpiton/piton/design/rtl/Flist.system
/home/centos/workspace/openpiton/piton/design/chipset/include/Flist.include
/home/centos/workspace/openpiton/piton/design/common/rtl/Flist.common
/home/centos/workspace/openpiton/piton/design/include/Flist.include
compiling DTS and bootroms for Ariane...
rm -f bootrom.img
bootrom.sv ariane.dtb
dtc -I dts ariane.dts -O dtb -o ariane.dtb
riscv64-unknown-elf-gcc -Tlinker.ld bootrom.S -nostdlib -static -Wl,--no-gc-sections -o bootrom.elf
riscv64-unknown-elf-objcopy -O binary bootrom.elf bootrom.bin
dd if=bootrom.bin of=bootrom.img bs=128
18+1 records in
18+1 records out
2356 bytes (2.4 kB) copied, 0.000187521 s, 12.6 MB/s
python ./gen_rom.py bootrom.img
rm bootrom.bin bootrom.elf ariane.dtb
rm -f src/main.o src/uart.o src/spi.o src/sd.o src/gpt.o startup.o bootrom_linux.elf bootrom_linux.bin bootrom_linux.img *.dtb
dtc -I dts ariane.dts -O dtb -o ariane.dtb
MAX_HARTS = 3
src/main.c: In function 'main':
src/main.c:14:9: warning: unused variable 'res' [-Wunused-variable]
14 | int res = gpt_find_boot_partition((uint8_t *)0x80000000UL, 2 * 16384);
| ^~~
CC <= src/main.c
MAX_HARTS = 3
CC <= src/uart.c
MAX_HARTS = 3
CC <= src/spi.c
MAX_HARTS = 3
src/sd.c: In function 'sd_copy':
src/sd.c:20:10: warning: unused variable 'buf' [-Wunused-variable]
20 | char buf[100];
| ^~~
CC <= src/sd.c
MAX_HARTS = 3
CC <= src/gpt.c
MAX_HARTS = 3
CC <= startup.S
riscv64-unknown-elf-gcc -DMAX_HARTS=3 -DUART_FREQ=30000000 -Os -ggdb -march=rv64imac -mabi=lp64 -Wall -mcmodel=medany -mexplicit-relocs -nostdlib -nodefaultlibs -nostartfiles -I./ -I./src -Tlinker.lds startup.o src/main.o src/uart.o src/spi.o src/sd.o src/gpt.o -o bootrom_linux.elf
/opt/riscv/lib/gcc/riscv64-unknown-elf/12.2.0/../../../../riscv64-unknown-elf/bin/ld: warning: bootrom_linux.elf has a LOAD segment with RWX permissions
LD >= bootrom_linux.elf
riscv64-unknown-elf-objcopy -O binary bootrom_linux.elf bootrom_linux.bin
dd if=bootrom_linux.bin of=bootrom_linux.img bs=128
50+1 records in
50+1 records out
6496 bytes (6.5 kB) copied, 0.000265683 s, 24.5 MB/s
python ./gen_rom.py bootrom_linux.img
PYTHON >=
bootrom_linux.svzero stage bootloader has been compiled!
done
generating PLIC for Ariane with 6 targets and 2 sources...
done
sims: Caught a SIGDIE. VCS_HOME not defined. at /home/centos/workspace/openpiton/piton/tools/src/sims/sims,2.0 line 1326.