L2 cache possible bug

[Dimitris Andronikou]

Hello,

We are using the OpenPiton SoC (VCU118 configuration) with 4 RISC-V cores. We’ve tested the design with both 256 KB and 512 KB total L2 cache sizes.

While running benchmarks (specifically lmbench), we noticed that the performance is very similar between the two cache sizes. After digging into the synthesized design, it appears that some address bits in the 512 KB configuration are being ignored or cut off, which suggests the upper part of the L2 cache might not be utilized.

Has anyone encountered this issue before? Could this be a configuration or address mapping problem? Any advice on how to ensure the full 512 KB of L2 is being used?

Thanks in advance.

[Jonathan Balkind]

Hm this kind of issue is definitely possible if it's a bit vector selection bug. Some performance debugging fixes have not made it into the design for various reasons. I would ask, is it specifically an issue in the L2 or are you not seeing the right requests making it to the L2 from the L1.5? Because there's also the aspect of L2 homing strategy which is set in the L1.5 by checking specific bits (https://github.com/PrincetonUniversity/openpiton/blob/d00933848245a9aac3dbd6b28a88d0e9ba7cd08d/piton/design/chip/tile/l15/rtl/l15_csm.v.pyv#L182-L198).

I'll nudge our colleagues from BSC and see if they recognise it. I think they may have used a large enough instance of the cache that they would've performance debugged this.

Thanks,

Jon

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[Dimitris Andronikou]

Hi Jon ,

Thanks for the quick reply!

We haven’t confirmed yet whether the issue originates from the L1.5, but based on the benchmark results, it seems that only about half of the 512 KB L2 cache is being used — the performance is nearly the same as with the 256 KB configuration.

I'll take a closer look at the file you mentioned — thanks for pointing that out.

Many thanks again,
Dimitris

[Jonathan Balkind]

Thanks to Neiel, this performance issue should be fixed by the following merged PR: https://github.com/PrincetonUniversity/openpiton/pull/166

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