Operation System Problem

[s1596...@gmail.com]

Hi, 

Could you provide the C code of ip_32W_gen and ip_32W_check. Because I need to run this project under the Linux. But these two files are compiled for Windows. 

Thanks. 

Zheng

[Jonathan Gao]

It looks like this become a main barrier for this IP. I am considering using verilog to replace the package generator and checker in testbench....

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[HyuniL KIM]

Now, I'm trying to evaluate this project to understand the 1G Ethernet. But you know, Can't simulate with svn environment due to that IP. When do you try to change it and If you don't have time to change it , Could you explain about this IP?

[dpaul]

Hello Gao,

That is indeed a barrier.
Have you already replaced this with Verilog file read?
If yes, I'd like to know!

Thanks,
dpaul

On Friday, December 19, 2014 at 12:49:51 PM UTC+1, Jonathan Gao wrote:

It looks like this become a main barrier for this IP. I am considering using verilog to replace the package generator and checker in testbench....

On Thu, Aug 21, 2014 at 2:48 AM, <s1596...@gmail.com> wrote:

Hi, 

Could you provide the C code of ip_32W_gen and ip_32W_check. Because I need to run this project under the Linux. But these two files are compiled for Windows. 

Thanks. 

Zheng

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