tri-mode eth MAC signals

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WachaG

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Oct 10, 2011, 6:38:58 AM10/10/11
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Dear developers and group members,

I am trying to use the Opencores tri-mode ethernet MAC core in my
student project (implementing a BPF in an FPGA). From the
specification I am not sure what some of the signals are meaning:

Rx_mac_pa and Tx_mac_pa
Rx_mac_BE and Tx_mac_BE (It seems to me a byte enable signal, but
how it works)

Pkg_lgth_fifo holds the lenghts of thereceived packets?

Also, I am not sure how the host interface works.


Is there an example design which shows the minimal requirements for a
working core?

Regards,
Gabor Wacha

gao jon

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Oct 15, 2011, 11:30:58 PM10/15/11
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"pa" means package available. If you rearch the timing diagram, you will figure it out.

"be" means byte enble. There is a 32 bit bus, conseqently the be is 2 bits wide.
2'b00      4 bytes enable
2'b01      1 byte enable
2'b10       2 bytes enable
2'b11       3 bytes enable

amir mohamad hatami

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Jul 14, 2014, 3:51:03 AM7/14/14
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could you tell me what 
Rx_mac_rd
Rx_mac_ra
Rx_mac_sop
Rx_mac_eop

mean exactly?
 

jay prakash

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Jul 14, 2014, 7:52:44 AM7/14/14
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Hi Amir ,
Have a look at page 26 an 27 in the file "Tri-mode_Ethernet_MAC_Specifications.pdf". There are three timing diagrams, which might explain most of the questions. Only for you some ideas what the signal names mean ;-) :
Rx_mac_ra: RX Read Availible (Package received successfully, ready to save the data)
Rx_mac_rd: RX Read (set by you, enables the data output)
Rx_mac_sop, Tx_mac_sop: Start Of Package (high for one clock cycle)
Rx_mac_eop, Tx_mac_eop: End Of Package (high for one clock cycle), surprise, surprise :-D
I hope this information helps. 

Regards
Jay



 

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amir mohamad hatami

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Jul 20, 2014, 1:07:20 AM7/20/14
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it does. thanks
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amir mohamad hatami

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Jul 20, 2014, 1:47:52 AM7/20/14
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could you tell me what the differences between Clk_125M       Clk_user    Clk_reg  and can they all be set to 125M?

tamirci

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Aug 19, 2015, 3:51:51 AM8/19/15
to opencores-tri-mode eth MAC

Hi Amir,

You say here that "look at page 26 and 27 on specification". I downloaded spec and codes before one month ago but i think the spec in the opencores is not current version. I have specification that has version Rev 0.1 January 25, 2006. And it does not have page 26 and 27.

I think this core is very well and would like to use it. But missing document makes it to use very hard. Please share latest version of specification document.

I will be very pleased if you share some usefull information. I have very limited time to complete a master project and need to send data over ethernet with Spartan 6.

Thanks in advance,

Regards,

14 Temmuz 2014 Pazartesi 14:52:44 UTC+3 tarihinde jay yazdı:
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