problem for UDP_IP_Core transmittion

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Hua Yu

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Jul 22, 2012, 4:27:04 PM7/22/12
to opencores-tri...@googlegroups.com
Hi,
I am a new guy for VHDL programming. I want to use Virtext-5(XUPV5-LX110T) board to implement high data transmission to PC. I downloaded an open UDP_IP_Core from opencore.org. I built a project and wrote a simble top level file for the UDP_IP_core. After I downloaded the bit file to Virtex-5 board, the transmission led always lights. However I can not receive any data from my PC. I have open the UDP port on my computer. But the Virtex-5 board still does not work. I have worked on this problem for nearly one week. But I can't solve this problem. The attached file my top file. Could someone help me solve this problem or give me some suggestion? Thanks so much.
top_level_state_machine.vhd

bashid

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Jul 14, 2020, 3:55:02 AM7/14/20
to opencores-tri-mode eth MAC
did your problem solve? Can you share that part of your code?
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