Hi all,
I have come across this research paper (attached) called "Design and implementation of IP-based iSCSI Offoad Engine on an FPGA" and the authors have mentioned they have used open source software based Open-iSCSI for their research. At the moment there are 2 questions based on this paper.
Question 1:
On page 3 and under section 2.4 ( Performance Analysis of Open-iSCSI), they have started the paragraph with following lines:
"We analyzed iSCSI traffic with Wireshark, the open source network packet analyzer. We measured traffic between a software initiator and a target by using a set of microbenchmarks. The microbenchmarks transmitted arbitrary number of data in both directions "
The question is...what are these microbenchmarks. There is no reference to these microbenchmarks in this paper. Any idea, what are these microbenchmarks?
Question 2:
Similarly, on the same page 3 and under section 2.3 (Related Work), they have written "The most common software implementations in the research community are open source Open-iSCSI and UNH-iSCSI projects".
After my research on UNH-iSCSI, I have found some work where some researchers have proposed a hardware accelerator for data transfer iSCSI functions. They analyzed UNH-iSCSI source code and presented a general methodology that transforms the software C code into the hardware HDL (FPGA) implementation. Hence their hardware accelerator is designed with direct C-to-HDL translation of specific sub-modules of UNH-iSCSI software.
The question: Is there any similar work like this for Open-iSCSI where specific sub-modules of Open-iSCSI are translated to a hardware language like Verilog/VHDL on hardware (FPGA)? If not, can you please give a hint what would possibly a starting point in case of Open-iSCSI? Because the attached paper does not mention the specific functions of Open-iSCSI code that could be translated to HDL.
Thanks !