TTL pulses

[Marlies Oostland]

Hi all,

I have a series of experiments where I recorded spikes, as well as TTL inputs on ADC channels. I recorded in binary format. On the last day of the experiment, I had issues with the GUI and therefore downloaded the latest version of the Open Ephys GUI (0.5.3), and built a new signal chain. When I look at the neuronal data, everything looks good. All TTL pulses recorded on the first days with an earlier version of the GUI (0.4.4.1) are also fine.

However, when I try to analyze the TTL pulses on the ADC channel from the last day of recording (= new version of GUI, new signal chain), I get data which doesn't make any sense at all, see attached image.

It looks like there is a wrong setting somewhere, either during the recording or during the analysis. Possibly when I built the new signal chain? This time I did not use the AUX channels, hence different total number of channels and TTL pulses on a different channel number, but that has been accounted for during the analysis). I'm really hoping the data from the TTL pulses are saved and the error is in the analysis, rather than in the way I recorded the data. During the recording I could see the TTL pulses on the relevant channels. I use the number of channels as provided by the structure.oebin file, and again, the neuronal data are fine suggesting it's not as simple as using a wrong number of channels during analysis, but it does look like it could be a simple error like that. 

Does anyone have any suggestion what I can do during the analysis stage to still extract the correct information from the channels with the TTL pulses?

Thanks,

Marlies

Information about the first TTL channel from the structure file:

Good day:

{'channel_name': 'ADC1',

     'description': 'ADC data channel',

     'identifier': 'genericdata.continuous',

     'history': 'Rhythm FPGA -> Bandpass Filter -> Common Avg Ref -> LFP Viewer -> Record Node',

     'bit_volts': 0.000152587890625,

     'units': 'uV',

     'source_processor_index': 70,

     'recorded_processor_index': 70},

Bad day:

{'channel_name': 'ADC1',

     'description': 'ADC data channel',

     'identifier': 'genericdata.continuous',

     'history': 'Rhythm FPGA -> Bandpass Filter -> Common Avg Ref -> LFP Viewer -> Record Node',

     'bit_volts': 0.000152587890625,

     'units': 'uV',

     'source_processor_index': 64,

     'recorded_processor_index': 64},

[Josh Siegle]

Hi Marlies,

Can you send the settings.xml file that was saved in the “Record Node” directory? I can check whether there’s something about the signal chain that could account for what you’re seeing.

In general, we recommend placing the Record Node directly after the source node (Rhythm FPGA), so none of the additional processing steps affect the recording.

Josh

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<Good_recording_TTL.jpg><Bad_recording_TTL.jpg>