FPGA power jack

[Chris Rodgers]

Hi everyone, basic question here... The documentation for Acquisition Board clearly states that one should not use the power jack on the FPGA but that is the only power jack I can find on my board (see pic). The board seems to work (or at least the LEDs turn on) whenever the USB cable is plugged in, even with nothing plugged into the power jack. 

https://open-ephys.github.io/acq-board-docs/User-Manual/Quickstart-guide.html

In this case, is it recommended to plug the power in the FPGA or just try to run the whole thing off the USB cable only?

Unrelated question: should I unplug the headstage before or after powering down the acquisition board, or does it not matter?

[Josh Siegle]

Hi Chris,

Recent acquisition boards that use the new Open Ephys FPGA (instead of Opal Kelly) can (1) operate on USB power only under most conditions and (2) have over-voltage protection on the FPGA power jack.

I'm not sure at what point the power draw will exceed what's possible to supply via USB alone, but with one or two headstages there shouldn't be any issues.

It's fine to leave any headstages plugged in when power cycling the board.

Josh

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