I made a mistake before: CPU0 is used for Linux and CPU1 for the baremetal application. Our Linux boots in SMP mode so no problem there right?
In our setup we run a v4.4.0 linux kernel.
Our Memory layout should be as defined in the linker script, placing the baremetal application including vrings and anything needed for open amp operation into the address range between 0x00 10 00 00 and 0x0f 00 00 00.
Do I need to change the linker script (it is not aware of any vrings, so should the memory range used be less than 0x0f 00 00 00, to squeeze the vrings on top of that)? What to I need to write into the device tree? What values should the additional entries (_binary_firmware1_start, _binary_firmware1_end, _binary_firmware2_start, _binary_firmware2_end) in the linker script .text section have?
And what must be configured in the resource table?
Is there any documentation how to set it all up that goes beyond the simple examples?
Updating a new Xilinx SDK version is currently not an option because we have to show a internal prototype soon and we can't overview implications an update would have.
Thanks for your help :).
Best Regards,
Simon
Actually :
//#include "openamp/open_amp.h"
#include "rsc_table.h"
/* Place resource table in special ELF section */
#define __rsc_section(S) __attribute__((__section__(#S)))
#define __resource __rsc_section(.resource_table)
#define RPMSG_IPU_C0_FEATURES 1
/* VirtIO rpmsg device id */
#define VIRTIO_ID_RPMSG_ 7
/* Remote supports Name Service announcement */
#define VIRTIO_RPMSG_F_NS 0
/* Resource table entries */
#define ELF_START 0x00000000
#define ELF_END 0x08000000
#define NUM_VRINGS 0x02
#define VRING_ALIGN 0x1000
#define RING_TX 0x08000000
#define RING_RX 0x08004000
#define VRING_SIZE 256
#define NUM_TABLE_ENTRIES 2
#define CARVEOUT_SRC_OFFSETS offsetof(struct remote_resource_table, elf_cout),
#define CARVEOUT_SRC { RSC_CARVEOUT, ELF_START, ELF_START, ELF_END, 0, 0, "ELF_COUT", },
const struct remote_resource_table __resource resources =
The application on CPU1 is set for default in lscript.ld
with baseaddr 0x02000000 and size 0x01000000.
I'm using SOCKET API in bsp and LWIP function in the code.
There is a problem of overflow in region .bss of app_cpu1.elf
I changed linker script size from 0x01000000 to 0x03000000
so this problem in SDK there isn.t.
But in the run of app_cpu1 , lwip_init() and other function of SOCKET API don't run.
How can I solve this problem of ddr memory and use of LWIP ?
Please use Xilinx support https://www.xilinx.com/support.html for the Xilinx example application questions/issues.
>
>
>
> The application on CPU1 is set for default in lscript.ld
>
> with baseaddr 0x02000000 and size 0x01000000.
>
>
>
> I'm using SOCKET API in bsp and LWIP function in the code.
>
> There is a problem of overflow in region .bss of app_cpu1.elf
>
>
>
> I changed linker script size from 0x01000000 to 0x03000000
>
> so this problem in SDK there isn.t.
>
>
>
> But in the run of app_cpu1 , lwip_init() and other function of SOCKET API don't run.
Not sure if your application make use of 0x01000000 address.
You can tried to keep baseaddress as 0x02000000 and just increase the size. But you will need to make sure the memory is not overlapped with other usage.
Best Regards,
Wendy
How can I solve this problem ?
As this example is provided by Xilinx, please use Xilinx support portal to the questions/issues related to this demo. https://www.xilinx.com/support.html#serviceportal
Best Regards,
Wendy