I'm testing the OpenAMP on ZynqMP with Xilinx SDK 2018.2 (patched with fix for urandom read seed #64)
I've succesfull run the "kernel space echo test" and now I'm tring to do same test from user space.
# test-metal-shared
metal: debug: added page size 4096 @/tmp
metal: debug: registered platform bus
metal: info: running [atomic]
metal: info: result [atomic]............................ pass
metal: info: running [mutex]
metal: info: result [mutex]............................. pass
metal: info: running [shmem]
metal: warning: failed to mlock shmem - Cannot allocate memory
metal: warning: failed to mlock shmem - Cannot allocate memory
metal: warning: failed to mlock shmem - Cannot allocate memory
metal: warning: failed to mlock shmem - Cannot allocate memory
metal: warning: failed to mlock shmem - Cannot allocate memory
metal: warning: failed to mlock shmem - Cannot allocate memory
metal: error: pagemap page not present, 3fd80f40 -> 0
metal: error: pagemap page not present, 3fd80f48 -> 0
Any suggestions? Thanks in advance.
Francesco.
/ {
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
rproc_0_reserved: rproc@40000000 {
no-map;
/*
0x40000000 elf0 (len: 0x2000000)
0x42000000 elf1 (len: 0x2000000)
0x44000000 ring0_tx (len: 40000)
0x44040000 ring0_rx (len: 40000)
0x44100000 ring1_tx (len: 40000)
0x44140000 ring1_rx (len: 40000)
0x44200000 shm0 (len: 0x100000)
0x44300000 shm1 (len: 0x100000)
*/
reg = <0x0 0x40000000 0x0 0x4400000>;
};
};
power-domains {
pd_r5_0: pd_r5_0 {
#power-domain-cells = <0x0>;
pd-id = <0x7>;
};
pd_r5_1: pd_r5_1 {
#power-domain-cells = <0x0>;
pd-id = <0x8>;
};
pd_tcm_0_a: pd_tcm_0_a {
#power-domain-cells = <0x0>;
pd-id = <0xf>;
};
pd_tcm_0_b: pd_tcm_0_b {
#power-domain-cells = <0x0>;
pd-id = <0x10>;
};
pd_tcm_1_a: pd_tcm_1_a {
#power-domain-cells = <0x0>;
pd-id = <0x11>;
};
pd_tcm_1_b: pd_tcm_1_b {
#power-domain-cells = <0x0>;
pd-id = <0x12>;
};
};
amba {
r5_0_tcm_a: tcm@ffe00000 {
compatible = "mmio-sram";
reg = <0 0xFFE00000 0x0 0x10000>;
pd-handle = <&pd_tcm_0_a>;
};
r5_0_tcm_b: tcm@ffe20000 {
compatible = "mmio-sram";
reg = <0 0xFFE20000 0x0 0x10000>;
pd-handle = <&pd_tcm_0_b>;
};
r5_1_tcm_a: tcm@ffe90000 {
compatible = "mmio-sram";
reg = <0 0xFFE90000 0x0 0x10000>;
pd-handle = <&pd_tcm_1_a>;
};
r5_1_tcm_b: tcm@ffe92000 {
compatible = "mmio-sram";
reg = <0 0xFFEB0000 0x0 0x10000>;
pd-handle = <&pd_tcm_1_b>;
};
elf_ddr_0: ddr@40000000 {
compatible = "mmio-sram";
reg = <0 0x40000000 0x0 0x2000000>;
};
elf_ddr_1: ddr@42000000 {
compatible = "mmio-sram";
reg = <0 0x42000000 0x0 0x2000000>;
};
test_r50: zynqmp_r5_rproc@0 {
compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
reg = <0x0 0xff9a0100 0 0x100>, <0x0 0xff340000 0 0x100>, <0x0 0xff9a0000 0 0x100>;
reg-names = "rpu_base", "ipi", "rpu_glbl_base";
dma-ranges;
core_conf = "split0";
srams = <&r5_0_tcm_a &r5_0_tcm_b &elf_ddr_0>;
pd-handle = <&pd_r5_0>;
interrupt-parent = <&gic>;
interrupts = <0 29 4>;
} ;
test_r51: zynqmp_r5_rproc@1 {
compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
reg =<0x0 0xff9a0200 0 0x100>, <0x0 0xff340000 0 0x100>, <0x0 0xff9a0000 0 0x100>;
reg-names = "rpu_base", "ipi", "rpu_glbl_base";
dma-ranges;
core_conf = "split1";
srams = <&r5_1_tcm_a &r5_1_tcm_b &elf_ddr_1>;
pd-handle = <&pd_r5_1>;
interrupt-parent = <&gic>;
interrupts = <0 29 4>;
} ;
vring0: vring@0 {
compatible = "vring_uio";
reg = <0x0 0x44000000 0x0 0x40000>;
};
shm0: shm@0 {
compatible = "shm_uio";
reg = <0x0 0x44200000 0x0 0x80000>;
};
vring1: vring@1 {
compatible = "vring_uio";
reg = <0x0 0x44100000 0x0 0x40000>;
};
shm1: shm@1 {
compatible = "shm_uio";
reg = <0x0 0x44300000 0x0 0x80000>;
};
ipi0: ipi@0 {
compatible = "ipi_uio";
reg = <0x0 0xff340000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 29 4>;
};
};
};