Most of the pins on the CPU were in the address and data buses.
Now of course these days the buses are bigger - 32 bits for data and 36
bits for address, so obviously the CPU has more pins. However this
doesn't really explain why so many.
Right here on my desk I have an AMD K6 CPU, that has at a rough count
somelike 200 pins or maybe 300 in an array around all four sides. Some of
the modern CPUs have over 400 pins. Why so many pins? What are they all
used for?
I don't know but Socket 7 was 321 pins. I always remembered that, an easy
number to remember.
Socket 8 (Pentium Pro) had 387 pins
Socket 370 was 370 pins (of course)
Pentium 4s are 423 or 478 pins
Socket A has 462 pins, (and 11 blanked-off holes)
Just thought you might want to know that. <g>
The new AMD 64-bit CPUs have heaps more
Athlon64 has 754 pins and the Opteron has 939!
I have no idea what they all do. Impressive though huh? Lots of pins.
--
~misfit~
Well for a start there are a huge number of pins needed to get power
into the chip. Even at 3 volts these chips are pulling in 20-25 Amps, so
if you allow for 1amp per pin you need 50 pins just for the power supply.
Add to that that the cache is often not on the same bus as the main
memory you then need another say 100 pins, then there are interupts, bus
syncronisation, clocks etc.
Yup heaps of pins for power ... have a look at the P4 pin assignments here
http://www.intel.com/design/pentium4/datashts/24988703.pdf
Its so its looks like you're actually getting something for the money you
shell out for the cpu. It really only uses about 15 pins, but that just
wouldnt look right :-)
Rider
> Well for a start there are a huge number of pins needed to get power into
> the chip. Even at 3 volts these chips are pulling in 20-25 Amps, so if you
> allow for 1amp per pin you need 50 pins just for the power supply.
Yep over the years the power usage have been going up, but the voltages
have been dropping. This means modern chips draw a lot of current compared
to older ones.
Cheers
Anton
The answer is power. The CPU needs heaps of power and it cant all go
through one pin, so they spread them out and use many pins for power.
and all that power explains why the cpu gets so hot :)
> and all that power explains why the cpu gets so hot :)
yeah, I might cut a few of them off, and cool that thing down a bit :)
--
Dave Hall
http://Dave.net.nz
We have Hangman, Pacman, and Space Invaders
> Right here on my desk I have an AMD K6 CPU, that has at a rough count
> somelike 200 pins or maybe 300 in an array around all four sides. Some of
> the modern CPUs have over 400 pins. Why so many pins? What are they all
> used for?
They don't need them, they just put them there to fill in the holes in the
sockets. It's a conspiracy by the socket makers, who are in turn owned by
the Freemasons. Feel free to clip a few off.
--
... Brendan
"'You pay for it before you eat it? What happens if it's dreadful?' 'That's why.'" -- Terry Pratchett, _Moving Pictures_
Note: All comments are copyright 1/04/2004 5:54:38 p.m., and are opinion only where not otherwise stated, and always "to the best of my recollection". www.computerman.orcon.net.nz.
> On Wed, 31 Mar 2004 23:38:14 +1200, Patrick Dunford wrote:
>
>> Right here on my desk I have an AMD K6 CPU, that has at a rough count
>> somelike 200 pins or maybe 300 in an array around all four sides. Some of
>> the modern CPUs have over 400 pins. Why so many pins? What are they all
>> used for?
>
> They don't need them, they just put them there to fill in the holes in the
> sockets. It's a conspiracy by the socket makers, who are in turn owned by
> the Freemasons. Feel free to clip a few off.
isnt everything ultimately owned by the freemasons?
--
---------------------------------------------------------
Steven H - B.I.T. Otago Polytechnic, Dunedin, New Zealand
.net Geek
L_0000: ldstr "Operator Error! - Insufficent Intellegence "
L_0005: call Console.Write
L_000a: br.s L_0000
Yep, and only 242 contacts on the package too. A lot less than there were
pins on the socket type.
--
~misfit~
But some of the slot ones had the cache on the package, no need for cache
buses.
I don't entirely see your point. The Socket 370 had the (L2) cache on the
CPU and it needed 370 pins, the P1 had no L2 cache on the CPU and it had 321
pins. Maybe I'm having a blonde moment, it is after 2am.
--
~misfit~
>> They don't need them, they just put them there to fill in the holes in the
>> sockets. It's a conspiracy by the socket makers, who are in turn owned by
>> the Freemasons. Feel free to clip a few off.
>
> isnt everything ultimately owned by the freemasons?
No, but THAT is a conspiracy theory put out by the Freemasons! ;)
(NB: I have nothing against the Freemasons, think they are pretty good
actually, but picked on them because Dunford is a psuedo-christian and lots
of christians get excited about conspiracy theories about the Freemasons)
--
... Brendan
"#3535. Contemporaneous exposition is in general the best." -- California Civil Code, "Maxims of Jurisprudence"
Note: All comments are copyright 2/04/2004 3:57:07 p.m., and are opinion only where not otherwise stated, and always "to the best of my recollection". www.computerman.orcon.net.nz.
Your headers contain reference to a fake domain, brendan.co.nz
Maybe you and truth are strangers.
> Your headers contain reference to a fake domain, brendan.co.nz
>
> Maybe you and truth are strangers.
It was changed by the Far Right Christian Fundamentalist conspiracy after I
sent it.
They leaving you out of the loop again ?
--
... Brendan
This is the way the world ends
This is the way the world ends
This is the way the world ends
Not with a bang but with a whimper.
- T.S. Eliot
Note: All comments are copyright 2/04/2004 10:43:18 p.m., and are opinion only where not otherwise stated, and always "to the best of my recollection". www.computerman.orcon.net.nz.
>I think if you want speed then it's prolly faster to shift out parallel
>data for a start which of course means more pins
Funnily enough, modern high-speed buses like SATA, FireWire etc tend to
be serial, not parallel. Even HyperTransport I believe can run over as
few as four pins or something.
The problem with parallel data is something called "timing skew": as
speeds go up, it becomes harder and harder to ensure that signals that
start from one end of the wires at the same time arrive at the other end
at the same time. By comparison, cranking up clock speeds is much
easier. This is why, even though you might need 64 times the clock speed
to send bits serially over 1 wire versus in parallel over 64 wires, the
serial design ends up cheaper to make.
Biggest issue is all those wires :)
>Lawrence D'Oliveiro
>
>> The problem with parallel data is something called "timing skew"...
>
>Biggest issue is all those wires :)
I remember as an undergraduate student (1979-1981), being told by a
friend that the biggest factor in the unit cost of integrated chips was
the number of pins on the packaging. The complexity of the actual chip
didn't enter into it!