The NuBus was designed by MIT, and sold to TI. It is quite easy to
interface to from a logic standpoint, since *everything* is
synchronous to the system clock. The whole bus runs on one 96 pin
connector, with the center 32 pins being extra power and grounds for
power hungry cards. The 32-bit address and data lines are muxed, so
you can get by with < 64 address/data buffers per card. The bus
arbitration is distributed on each of the cards, and uses an
inherently fair algorithm. It was truly designed for a multiprocessor
system. It definitely requires much less in terms of bus lines and
support logic to make it work than the other 32 bit addr 32 bit data
busses. All in all a good example of a bus designed by people that
didn't need to make a particular processor look good.
--
Wolfgang Rupprecht {harvard|decvax!cca|mit-eddie}!lmi-angel!wsr