Upduino V3.1

0 views

Skip to first unread message

Latarsha Dorrance

unread,

Aug 3, 2024, 3:25:33 PM8/3/24

to neelomischpo

The UPDuino v3.1 is a small, low-cost open source FPGA board. The board features an on-board FTDI FPGA programmer, flash and 3-color LED with all FPGA pins brought out to easy to use 0.1" header pins for fast prototyping.

UPduino's are fully tested and programmed with a blinking LED flash image before shipping. Included are two 24 pin 0.1" header (not soldered on to give you flexibility in mounting). Please note that a micro USB cable is not included!

The UPduino is a great way to get started to learn about programming FPGA's as it is low cost, self-contained and you can be up and running in a few minutes using an open source toolchain.The previous UPduino had many design issues some of which are documented here. A survey sent to the community resulted in various improvement ideas that formed the basis of the design improvements. Changes/improvements to the v2.1 design are documented here.

Products are shipped from the USA. We usually process orders every 2-3 days. We will try to ship out rush orders the same day if possible. You will receive an email confirmation as soon as the product has been processed for shipping from our shipping provider.

Shipping times can vary widely depending on the chosen shipping method. The cheapest shipping is through tracked mail via USPS and it can take anywhere from 1-8 weeks to receive the package for non-US shipments. US shipments usually arrive within 5 days after mailing. If you do not receive your order 8 weeks after it has been shipped, please contact us at: sales at tinyvision.ai and we can work to resolve the issue. Unfortunately, the USPS does not respond to our calls about where is my package as they simply point us to the same information you receive.

Please note: Shipments to the EU have VAT paid. This avoids the added burden of you clearing the VAT and associated processing fees. If the order exceeds 150 Euros, you will be responsible to clear customs.

UPduino v3.1 is a compact and cost-efficient open-source FPGA board dedicated to applications that involve sensitive signal conditioning. It comprises of FTDI FPGA programmer, flash memory, a 3-color LED and FPGA pins for quick prototyping. The all-new UPduino v3.1 is an updated version of its predecessor where it improves on the shortcomings and limitations of its predecessors. The feedback from the discord community users is taken into consideration, and hence the changes to the board have been done accordingly.

To mark the changes made for issues mentioned above, the company has added a sticker denoting v3.1. The upgrades are visible in the APIO board files as well as the EEPROM to show v3.1, indicating the most recent version.

With UPduino v3.1 you can introduce yourself to programming FPGAs since its low cost and the assistance provided by the open-source toolchain. This open-source toolchain is made publicly available enabling the users to experiment and learn about hardware programming. This UPduino v3.1 is available for sale at $25, making it a true cost-efficient FPGA. For more details on the new UPduino v3.1, visit tinyVision.ai

Saumitra Jagdale is a Backend Developer, Freelance Technical Author, Global AI Ambassador (SwissCognitive), Open-source Contributor in Python projects, Leader of Tensorflow Community India, and Passionate AI/ML Enthusiast

We usually process orders every 2-3 days. Rush orders will be shipped out the same day. You will receive an email confirmation as soon as the product has been processed for shipping. Shipping times can vary widely depending on the chosen shipping method. The cheapest shipping is through untracked mail via USPS and it can take anywhere from 1-8 weeks to receive the package. If you do not receive your order 8 weeks after it has been shipped, please contact us at: sales at tinyvision.ai and we can work to resolve the issue. Unfortunately, the USPS does not respond to our calls about where is my package as they simply point us to the same information you receive.

We look for the most active & best members of the Tindie community, and invite them to join. There isn't a selection process or form to fill out. The only way to become a Tindarian is by being a nice & active member of the Tindie community!

The UPduino v3.1 is an affordable development platform that showcases the capabilities of the Lattice ICE40 Ultra Plus 5K FPGA. This device is also fully compatible with the open-source graphical design tool, IceStudio.

The UPduino v3.1 is built on a 4-layer PCB and features integration of the Lattice UltraPlus ICE40UP 5K FPGA. This FPGA boasts 5.3K LUTs and comes equipped with 1Mb SPRAM (Single Port RAM), 120Kb DPRAM, and 8 Multipliers, as indicated on the product page.

Autonomy is a double-edged sword. We know that a level of control over our work is a good thing and gives us a sense of ownership, and independence that feels good. But, the flip side is that if we are the ones calling the shots, we have to make the decisions about how to spend our time and prioritize; separating the important from the urgent.

This is a document that lists out the things that drive you. I break this down into three separate subheadings: Personal Values, Career Strategic Plan, and Personal Strategic plan. In my Personal Values I articulate what is most important to me and what I want to prioritize. For example, that I strive to value people over things in all circumstances and to grow in knowledge, character, and humility. I use the 4C buckets that I talked about a few weeks ago to break down how I apply these.

This is the first level of planning. The main goal is to zoom out and think about a long enough time scale that will allow you to set some goals that would really move the needle. These goals should align with your core values and be ambitious enough that you will need the entire semester to make significant progress on them. For me, these semester goals are centered around the big tasks I hope to achieve as part of my teaching or scholarship; perhaps a new proposal I wish to write or a new course I want to develop. These goals should be relatively succinct (maybe a sentence or two at most).

After this review and reflection step, I sit down and sketch out the tasks that I want to accomplish each day that week. This starts with my calendar for any scheduled meetings, classes, or other deadlines. Then, I pull from my master task list where I keep a list of all the tasks that are on my plate. Based on how much time I expect to have on a given day for work, I decide how many and which tasks to schedule for a given day.

This board has a lot to offer at its $25 price point. The ICE40UP5K FPGA has a decent number of logic elements at 5300 along with some DSP blocks and RAM blocks (1 Mb single-port, 120 Kb dual-port). The board also features on-board USB programming, all the FPGA and FTDI pins brought out to headers, a 12 MHz oscillator, 4 MB qSPI flash, and an RGB LED.

This board is a similar idea to the fomu board I wrote about earlier this year, but is more amenable to breadboarding which is better for a course. To top it all off, it benefits from some freedom with respect to toolchain: as opposed to Intel FPGAs, the Lattice ICE FPGAs can be programmed with open-source tools using the icestorm project (most easily accessed through apio).

As we head toward the summer, I\u2019m sitting down and making a plan (so type-A, right?). The autonomy of an academic is perhaps unparalleled and so I often find myself wrestling with how to spend my time most effectively. The method I use is a lightly adapted version of ideas from Cal Newport that I call hierarchical, multi-scale time management. In the next few paragraphs I hope to give you a glimpse of how I use this strategy with the hope that you might find parts of it you might find helpful for your own planning strategy.