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hardware setup using chassis PXIe-1065: Generate sine tone

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Prads

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Jul 26, 2008, 3:10:09 PM7/26/08
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Hello, We have an NI PXIe-1065 chassis with a -PXI 5610 and PXI 5442-AWG together (VSG) and -PXI 5600 and PXI 5142-Digitizer together (VSA).We are following the manual RF application development course manual- Exercise 2.1We have made the following external connection in our chassis as per the manual:
5442 Ch 0 to 5610 INPUT (15-35Mhz)
5442 Clk in to 5610 (10 Mhz OUT)
5412 Ch 0 to 5600 OUTPUT (50 ohms)
5412 Clk in to 5600 (10Mhx OUT)Are we missing any other connections?We want to generate a sine tone using VSG, Max test Panels and acquire a spectrum using VSA and Max test Panels. However after we  change the frequency and Power of NI567x tab in the NI 5610, we get the following error:The AWG reported the following error:" DAQmx Error -200245 occurred:Measurements: PLL could not phase-lock to the external reference clock.Make sure your reference clock is connected and that it is within the jitter and voltage specifications. Also, make sure the reference clock rate is correctly specified.Device:  Dev1Status Code: -200245" Please advice us what to do. Regards,Prads

Prads

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Jul 28, 2008, 6:10:10 PM7/28/08
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Hello,
I debugged the error. The cables were bad.
Thanks,
Prads

Ana P

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Jul 28, 2008, 7:10:11 PM7/28/08
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Hi Prads,

I?m glad that you solved the error. Regarding the second question in your post, yes you should select ?External PC? when identifying the chassis if you are connected to it through a PC using MXI. Regards,

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