Digital Circuit Design Book

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Hortense Malovich

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Jul 25, 2024, 7:47:25 PM7/25/24
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Basically, circuit design interest me a lot. I like the idea of working with AND OR NOT etc gates and building things with them. I've been wanting to build a CPU for quite a few years now, but I lack the knowledge. I'm fairly decent at programming however, so I can think "logically", but with circuit design it all is very difficult for me to understand past simple adders and such.

So, I'm looking for a beginner's book on the subject. I plan on doing all design and testing in a simulator such as Logisim, but being shown how to actually put circuits together on a breadboard out of gates(or even transistors and such) would be a definite plus, but I wouldn't want for that to be the focus of it all.

I'm not familiar with the content of the 2009 version (having taken it back when it was breadboards & modules) but later used the 2004? OCW version (java iirc simulation) as a reference, then implemented that processor architecture in verilog and subsequently in an FPGA kit.

Take a look at . I consider this the "Arduino" of FPGAs. They have a whole system that includes an inexpensive development board, easy to use software, and tutorials for Verilogue and even a new language they are developing called Lucid. It is really a great resource. I found it easy to use and would recommend it for anyone wanting to try digital circuit design!

I've tried converting the truth table into canonical notation, but I end up with a gigantic mess. Using canonical representation worked well for "smaller" chips, but is now immensely complicated. How can I think about putting together a "complicated" chip in a way that doesn't involve just mashing together random chips?

We can see a pattern emerging which is that every input is AND'ed with some "enabling term" which switches that input on or off. As the enabling terms are exclusive (only one can be true at any time) the effect is to switch the output to the desired input.

It might also be worth pointing out that once you come to designing digital logic chips on a larger scale, it's usually done at a much higher level these days. Often using a Hardware Description Language (usually Verilog or VHDL), or even using C for parts of the chip in some domains.

Once you work at that level, you very rarely write the code for a MUX, but it is very useful to know as you write the textual description that you're asking the synthesis tool to produce one for you, and that you have some grasp of how "big" (in gates) it's likely to be.

Another point to note is that if you move to designing with FPGAs, your fundamental building block is not NAND gates, but 4 or 6 input look-up tables (with sundry other assisting blocks). That changes your viewpoint, as any function of 4 (or 6) inputs costs the same...

There are many Logic families that follow the principle of Digital Signals. Examples of such Logic families consider 3.5V to 5V voltage as high logic and 0V to 1V as low logic. This means voltage lying anywhere between 3.5V to 5V would be represented by 1 and voltage lying anywhere between 0V to 1V would be represented by 0. The actual value of voltage is not important in digital signals.

Representation for a range of voltages as 1 or 0, makes digital circuit operation simpler than analog or fuzzy circuits. Operating only in two states, either high or low, makes these signals fast, and less susceptible to noise, temperature, and irrespective of the aging components.

Digital Circuits are designed using logic gates, diodes, transistors, inductors, capacitors, and resistors. As Digital Circuits follow Boolean Laws, the logic expressions should be simplified for a small circuit.

The inputs of the first half adder are two single binary digits A and B. The output of the first half adder sum S is fed to the input of the second half adder terminal 1 on K. The sum output of the second half adder is obtained across X.

The inputs of the first half subtractor are two single binary digits A and B. The output of the first half subtractor difference D is fed to the input of the second half subtractor terminal 1 on K. The difference output of the second half subtractor is obtained across X.

The output across the second half subtractor for Difference X is a direct XOR operation of D of the first half subtractor at input terminal 1 and the borrow bit P at input terminal 2 of the second half subtractor.

CircuitLab provides online, in-browser tools for schematic capture and circuit simulation. These tools allow students, hobbyists, and professional engineers to design and analyze analog and digital systems before ever building a prototype. Online schematic capture lets hobbyists easily share and discuss their designs, while online circuit simulation allows for quick design iteration and accelerated learning about electronics.

I've built a full custom digital circuit in virtuoso, suppose to run at 3GHz. I tried to simulate it for 1ms, which takes several days... Actually I just need digital behavior of it and do not care about the transistor level things. Is there any way that I can simulate it digitally, ie, reducing the simulation time? Thanks a lot!

Thank you! Right now, I have to build the entire circuit in transistor level, it performs digital behavior, I wonder if I can do something to speedup the simulation, while it is still transistor level.

Hi Wenxu

You can also use our ultrasim fastspice simulator to do the simulation. It allows you to set different accuracy modes on your blocks. E.g. set "digital_fast" mode for the custom digital block and use default mode for the other blocks.


Best regards
Quek

Besides, I found that "aps" is also a "simulator" choise under Simulator/Directory/Host, should I change from "spectre" to "aps" when I enable APS mode in "Setup->High Performance Simulation"? Or, what's the difference between "spectre" simulator with APS mode and "aps" simulator with APS mode?

You should not use "aps" as the choice of simulator under Simulator/Directory/Host - that is obsolete and was the initial interface to the APS technology. In fact in later IC615 ISRs it has been removed. The correct interface is the Setup->High Performance Simulation.

In both modes the simulator is the same - but the interface via "aps" as the simulator is more limited because it dates from when APS had just been implemented and only supported a subset of spectre's capability.

Ultrasim has the benefit of being able to trade off accuracy versus speed for particular blocks, and if it's custom digital you probably don't need full spectre accuracy - and hence can get speed improvements that way.

As a tool designed as a learning environment or digital electronics, it really hit the mark. As a beginner in electronics, I was extremely pleased by Deeds when working through the nand2tetris exercises, and again when revisiting it while writing this blog post.

KiCad is after all a pcb design program. PCB design programs need symbols for real parts. The reason to simulate in kicad is such that you can test your design with said real parts. If he wants a simple digital simulator he should look into things like logisim which specializes on simple digital simulations.
(Which was already suggested in a different thread.)

Just to make it clear. I am in no way against using kicad for this purpose. But if people expect it to be a simple digital simulator, they try it out and find that this feature is not really present the way they expect, then people will get the idea that kicad is worthless. It is an extremly good tool for pcb design and i think the spice integration will add to that functionality. But the core function will remain the pcb design stuff.

If we add these symbols i guarantee a lot of beginners will use them and expect to make a pcb from them. My main point is: We can not add things that will compromise the core function of kicad. At least not to the official distribution.

What is the problem of using real devices in a simulation? After all the reason to simulate is to build the thing and verify it later with a measurement. What reason is there to have a powerful spice simulator and only run some digital approximation. (Which can be done as i said above in simpler tools. That are also open source.)

I suppose you would treat it like how spice gives you ideal op amps, ideal resistors, etc, Having a generic library of functional parts until the simulation library is furthur built up would help people to draft ideas,

Personally I have not had to track down device specific models before, however I am going to guess that its only there for companies that have there own simulation package, or are popular enough that someone else has already made one.

I think beginners are going to have a similar problem they do now with symbol/footprint split. They will expect atomic symbols that also have the correct simulation for the part, i.e. a BSS138 has the exact model required for the ngspice version in KiCad. They also will expect to press a button and have the complete circuit simulated without further effort!

There was a discussion on the github repo about that. The first point was that these models are most likely encrypted. And as you already said there is a user (or download) agreement. Wayne said that he is categorically against including such models in kicad. (Which is also my opinion on this.)

Today, most PCBs can be considered to be at risk of some type of signal integrity problem that is normally associated with high speed digital design. High speed PCB design and layout focuses on creating circuit board designs that are less susceptible to signal integrity, power integrity, and EMI/EMC problems. While no design is ever totally free of these problems, by following these high speed board design guidelines they can be reduced to the point where they are unnoticeable and do not create performance problems in the final product.

The PCB stackup you create for a high speed circuit board will determine the impedance, as well as ease of routing. All PCB stackups include a set of layers dedicated to high speed signal, power, and ground planes, and there are several points to consider when assigning layers in a stackup:

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