Query regarding latest MV5

[Ankita (Garg) Goel]

Hi,

I am trying to port the multi-threaded support of MV5 to the latest version of M5. From the link below,

http://www.cs.virginia.edu/~jm6dg/fractal/m5patches.htm

I understand that the MV5 patches are based on a particular M5 version, between beta4 and beta5. Is there a newer version  of MV5 patches available someplace ?

Thanks a lot for your help!

--
Regards,
Ankita

[Jiayuan Meng]

Hi Ankita,

There is indeed a new version --- but based on the same version of M5,
and it is integrated into the current MV5 release. Instead of using
these patches, I would recommend that you start with MV5 and then do a
diff with the M5 version that MV5 is based upon.

The M5 version that MV5 is based on:
http://www.cs.virginia.edu/~jm6dg/fractal/VF2_base.tar.bz2

The current MV5 release:
http://www.cs.virginia.edu/~jm6dg/fractal/hgfractal_feb_2011.tar.bz2

Jiayuan

[Ankita (Garg) Goel]

Hi Jiayuan,

Thanks for pointing me to the latest version. However, I am facing an issue with the base version of M5 itself, not sure if you have come across it or not. I built the X86_SE as follows:

# scons build/X86_SE/m5.opt

I have a simple 'hello world' c program binary.

# build/X86_SE/m5.opt configs/example/se.py -c test

M5 Simulator System

Copyright (c) 2001-2006

The Regents of The University of Michigan

All Rights Reserved

M5 compiled Oct 31 2011 21:42:05

M5 started Mon Oct 31 21:48:32 2011

M5 executing on rollercoaster

command line: build/X86_SE/m5.opt configs/example/se.py -c test

Global frequency set at 1000000000000 ticks per second

0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000

warn: Entering event queue @ 0.  Starting simulation...

warn: instruction 'fnstcw_Mw' unimplemented

warn: instruction 'fldcw_Mw' unimplemented

warn: instruction 'rdtsc' unimplemented

warn: instruction 'pxor_Vo_Wo' unimplemented

warn: instruction 'movdqa_Vo_Wo' unimplemented

warn: instruction 'pcmpeqb_Vo_Wo' unimplemented

warn: instruction 'pmovmskb_Gd_VRo' unimplemented

warn: instruction 'movdqa_Vo_Wo' unimplemented

warn: instruction 'pcmpeqb_Vo_Wo' unimplemented

warn: instruction 'pmovmskb_Gd_VRo' unimplemented

^CExiting @ cycle 14678849000 because user interrupt received

Have you come across this ? Anything that I might be missing in the steps ? though the same set of steps work fine with the latest version of m5. 

Thanks a lot for your help and time!

Regards,

Ankita

--
Regards,
Ankita

[Jiayuan Meng]

Ah, I haven't seen this issue before. It is possible that x86 wasn't
as stable as it is now in M5...

Jiayuan

On Mon, Oct 31, 2011 at 9:53 PM, Ankita (Garg) Goel

[Ankita (Garg) Goel]

Hi Jiayuan,

I am starting to look into porting the SIMD support to x86. It seems like quite an effort. However, could you pl guide my by providing some pointers on where I could start ? Pointers to some resources that might be useful?

Thanks a lot for all your help so far!

Regards,

Ankita

--
Regards,
Ankita

[Jiayuan Meng]

Hi Ankita,

I assume you are trying to support x86 in MV5's system emulation mode.
In order to port things to x86, you need to identify in the x86
instruction set which ops are nops that can be used by MV5 to support
additional functionality, like MV5 did for Alpha. A good examples to
follow is src/arch/alpha/isa/decoder.isa and main.isa. There should
be something similar for x86 as well. These byte codes need to be
replaced with the byte codes for x86 in api/api_asm.h|cpp:

simd_diverge (api_asm.h)
simd_converge (api_asm.h)
asm_callsys (api_asm.cpp)

Also, you need to change the system call mapping for x86 systems. The
mapping for ALPHA is defined in src/arch/alpha/linux/process.cc
(system calls numbering larger than 448 are MV5 specific). See if you
can find out the corresponding file for x86. After you amend the
system call table for x86, the system call numbering may change, so
make sure you also update the system call numbers in
api/syscall_num.hh accordingly.

Jiayuan

[Ankita (Garg) Goel]

Thanks Jiayuan, this is useful information.

After discussing with my advisor yesterday, I have decided to use the Alpha ISA itself for my study. In this regard, I had one question regarding the fractal API included in MV5. Is it MV5's native library implementation or derived from some other project ?

Regards,

Ankita

--
Regards,
Ankita

[Jiayuan Meng]

The fractal API is native to MV5. Actually it kind of drove MV5's
early development.

Thanks,

Jiayuan