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FastATA 4000 driver

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Radosław Kujawa

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Jan 3, 2011, 2:29:11 PM1/3/11
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Hi.

My A3000 is currently equipped with FastATA 4000, which is not supported by NetBSD. This prevents me from booting fully, and severely affects my ability to do anything useful ;). Today I started hacking around wdc_buddha.c and created attached driver.

Driver compiles and attaches correctly, but it does not work (yet) - kernel hangs during hard drive detection (both on m68k and ppc). I think it may be something related to interrupt code. Unfortunately it hangs so badly that I'm unable to enter DDB.

Maybe someone will be able to point out obvious mistke in this code?

Very short description of FastATA 4000 registers is available on Elbox's web site in archive with Linux drivers ( http://www.elbox.com/download/fastata.tar.gz in file README.fastata ). There's no Linux driver for FastATA 4000, so this description is the only publicly available source of information.

--
Best regards,
Radosław Kujawa

wdc_fastata4k.c

Frank Wille

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Jan 4, 2011, 12:32:22 PM1/4/11
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Radoslaw Kujawa wrote:

> Driver compiles and attaches correctly, but it does not work (yet) -
> kernel hangs during hard drive detection (both on m68k and ppc). I
> think it may be something related to interrupt code. Unfortunately it
> hangs so badly that I'm unable to enter DDB.
>
> Maybe someone will be able to point out obvious mistke in this code?

I didn't analyze the whole code but maybe this is a problem:
sc->sc_iot.absm = &amiga_bus_stride_4swap;

You are using a bus space with a stride of 4, so the register offsets you
are using would have to be divided by 4.

A bus space with a stride of 0x100 could be useful here, but it doesn't
exist yet.


> Very short description of FastATA 4000 registers is available on
> Elbox's web site in archive with Linux drivers (
> http://www.elbox.com/download/fastata.tar.gz in file README.fastata ).

And maybe this sentence from the Readme is another problem:

"Use polling for find interrupt for devices, see FastATA Int Status
Register."

Does it mean that the FastATA controller does not generate any hardware
interrupts?

--
Frank Wille


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