Arbeitskreis Modellierung von Systemen und Parameterextraktion
Modeling of Systems and Parameter Extraction Working Group
MOS-AK Workshop as ESSDERC/ESSCIRC Virtual Educational Event
Grenoble, September 14, 2020
Together with local ESSDERC/ESSCIRC Organization Team as well as International MOS-AK Board of R&D Advisers and all the Extended MOS-AK TPC Committee, we have the pleasure to invite to consecutive, 18th MOS-AK Workshop as ESSDERC/ESSCIRC Virtual Educational Event
Scheduled, subsequent 18th MOS-AK Workshop organized as an integral part of the ESSDERC/ESSCIRC Confernces, aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and TCAD/EDA FOSS and commercial tool developers and vendors.
MOS-AK Workshop Program
includes 8 webinars by the internationally recognized compact modeling experts:
W_1 Qucs-S and QucsStudio for compact device modelling.Mike Brinson
London Metropolitan University (UK)
W_2 Memory Modeling for Neuromorphic Computing Mansun Chan
Hong Kong University of Science & Technology (HK)
W_3 Compact Modeling of Oxide and Organic Thin Film Transistors Benjamin Iniguez
Universitat Rovira i Virgili, Tarragona (SP)
W_4 Latest developments of L-UTSOI: A compact model dedicated to low-power analog and digital applications in FDSOI technologies
Sébastien Martinie
CEA-Leti, Grenobel (F)
W_5 Overview of the ASM-HEMT Model Yogesh Chauhan
IIT Kanpur (IN)
W_6 ngspice - current status and developments Holger Vogt
Fraunhofer IMS, Duisburg (D)
W_7 LDMOS compact modeling and the PSPHV model Kejun Xia
NXP (USA)
W_8 Nanowire Junctionless ISFETs Ashkhen Yesayan
Institute of Radiophysics and Electronics National Academy of Sciences (AM)
WG07072020