[C4P] ESSDERC Track3 "Compact Modeling and Process/Device Simulation"

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Wladek Grabinski

Mar 23, 2021, 9:50:29 AM3/23/21
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51st European Solid-State Device Research Conference ESSDERC
47th  European Solid-State Circuits Research Conference ESSCIRC  
will be held together in hybrid format in Grenoble in September this year
The conferences will be arranged in three device-related tracks, three joint tracks, and seven circuit-related tracks. Among the device-related there will be the Track3: “Compact modeling and process/device simulation” (including TCAD and advanced simulation techniques and studies) although not limited, papers are solicited for the following main topics:

•             Compact/SPICE modeling of electronic, optical, organic, and hybrid devices and their IC implementation and interconnection.
•             Verilog-A models of the semiconductor devices (including Bio/Med sensors, MEMS, Microwave, RF, High voltage and Power, emerging technologies and novel devices), parameter extraction, reliability and variability, performance evaluation and open source benchmarking/implementation methodologies.
•             Modeling of interactions between process, device and circuit design, Design Technology Co-Optimization, Foundry/Fabless Interface Strategies.
•             Numerical, analytical, statistical modeling and simulation of electronic, optical and hybrid devices, interconnect, isolation and 2D/3D integration; Aspects of materials, fabrication processes and devices e.g. advanced physical phenomena (quantum mechanical and non-stationary transport phenomena, ballistic transport, …); Mechanical or electro-thermal modeling and simulation; DfM.
•             Reliability of materials and devices.
•             Design Technology-Co-Optimization.

The deadline for the submission of abstracts is April 19th, and the call for papers can be downloaded here https://www.esscirc-essderc2021.org/call-for-papers

Thierry Poiroux, CEA-LETI (F) - Track3 Chair
Compact Modeling and Process/Device Simulation
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