Nodebug designs not supported - Modelsim PE student edition

[Hima]

Hi,

I am using Modelsim PE student version 10.2b with Xilinx 13.2 to simulate the example design that comes with the PCI express endpoint block plus IP core package. I have compiled simulation libraries using compxlib. I simulate using the command vsim -do simulate_mti.do. I see the error as follows:

# ** Fatal: Attempting to load -nodebug design unit.

# Nodebug designs are not supported.

#

# Time: 0 ps Iteration: 0 Instance: /board File: ../board.v

# FATAL ERROR while loading design

# Error loading design

Error loading design

What I understand is the verilog files for the IP core are encrypted because of which hierarchical compilation is disabled. I see a switch -NODEBUG for vcom/vlog in modelsim.ini file. I disabled them to 0 but still the same error. Is there a way to remove this error in simulation ?

I went through a few related discussions on this group but could not arrive to any definite solution. Any help is appreciated.

Thanks,

Hima.

[Larry]

Give us a larger snippet of the transcript so we can see what is being loaded just before the fatal error.  I suspect that you may be trying to load something from the Xilinx secureip library.  If this is the case there is nothing you can do since secureip has already been encrypted. 

[Hima]

Thanks for the prompt response. Attached is the snippet of the transcript.

Hima.

[Larry]

As I suspected, you are loading a secureip model that has been pre-compiled and encrypted (Loading secureip.GTP_DUAL_FAST).

Since you can't use encrypted models with the student edition you are either going to have to find an equivalent model to substitue or you are going to have to move to the PE or SE version of ModelSim.