Hello Everyone!
I've just started to learn how to program in Verilog and to use Modelsim. I got stuck while I was following the tutorial in the part where it explains how to do a debug...
When it tells me to View the Files of my module and to open the module itself to put a break-point before debugging, Modelsim doesn't let me do it...
When I try to View the Source of my file (Counter.v) I receive this error:
# wrong # args: should be "load file ?pkg? ?interp?"
I have already tried to view the source directly from the VSIM prompt and I receive the same answer. I also tried to change the privileges of the files (only read), but it doesn't change...
Does anybody know how to solve it? Debugging it's a major resource... it's not something that you can avoid...
Thank you very much for your help!
Giovanni