Problem with MPE SE getting stuck on simulation

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Pladio

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Jan 6, 2012, 1:31:07 PM1/6/12
to ModelSim PE Student Edition
Hello,

I get the following messages and I have no idea what to do to fix
this.
When I run my script, the messages come and then nothing happens. I
tried reverting to previous code that worked, but that didn't help.
Nothing seems to work anymore.



do run.fdo
# ** Warning: (vlib-34) Library already exists at "work".
#
# Model Technology ModelSim PE Student Edition vcom 10.1 Compiler
2011.12 Dec 6 2011
# -- Loading package STANDARD
# -- Loading package TEXTIO
# -- Loading package std_logic_1164
# -- Loading package NUMERIC_STD
# -- Compiling entity AdcController
# -- Compiling architecture AdcController_Arch of AdcController
# ** Warning: [9] Main.vhd(79): (vcom-1013) Initial value of "PISOReg"
depends on value of signal "PISOReg1".
#
# Model Technology ModelSim PE Student Edition vcom 10.1 Compiler
2011.12 Dec 6 2011
# -- Loading package STANDARD
# -- Loading package TEXTIO
# -- Loading package std_logic_1164
# -- Compiling entity AdcController_tb
# -- Compiling architecture behavior of AdcController_tb
# ** Warning: [4] ADCController_tb.vhd(119): (vcom-1207) An abstract
literal and an identifier must have a separator between them.
# ** Warning: [2] ADCController_tb.vhd(120): (vcom-1090) Possible
infinite loop: Process contains no WAIT statement.
#
# // ModelSim PE Student Edition 10.1 Dec 6 2011
# //
# // Copyright 1991-2011 Mentor Graphics Corporation
# // All Rights Reserved.
# //
# // THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
# // WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS
# // LICENSORS AND IS SUBJECT TO LICENSE TERMS.
# //
# // NOT FOR CORPORATE OR PRODUCTION USE.
# // THE ModelSim PE Student Edition IS NOT A SUPPORTED PRODUCT.
# // FOR HIGHER EDUCATION PURPOSES ONLY
# //
# vsim -lib work -t 1ps ADCController_tb
# Loading std.standard
# Loading std.textio(body)
# Loading ieee.std_logic_1164(body)
# Loading work.adccontroller_tb(behavior)
# Loading ieee.numeric_std(body)
# Loading work.adccontroller(adccontroller_arch)
# ** Warning: (vsim-8683) Uninitialized out port /adccontroller_tb/uut/
DataReady has no driver.
#
# This port will contribute value (U) to the signal network.
#
# ** Warning: (vsim-8683) Uninitialized out port /adccontroller_tb/uut/
ReadData(13 downto 0) has no driver.
#
# This port will contribute value (UUUUUUUUUUUUUU) to the signal
network.
#
# ** Warning: (vsim-8683) Uninitialized out port /adccontroller_tb/uut/
CLKIN has no driver.
#
# This port will contribute value (U) to the signal network.
#
# ** Warning: (vsim-8683) Uninitialized out port /adccontroller_tb/uut/
ROW(4 downto 0) has no driver.
#
# This port will contribute value (UUUUU) to the signal network.
#
# ** Warning: (vsim-8683) Uninitialized out port /adccontroller_tb/uut/
COL(4 downto 0) has no driver.
#
# This port will contribute value (UUUUU) to the signal network.
#
# ** Warning: (vsim-WLF-5000) WLF file currently in use: vsim.wlf
#
# File in use by: David Ender Hostname: DAVIDENDER-TOSH
ProcessID: 4320
#
# Attempting to use alternate WLF file "./wlftsqwr66".
# ** Warning: (vsim-WLF-5001) Could not open WLF file: vsim.wlf
#
# Using alternate file: ./wlftsqwr66
#

Pladio

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Jan 6, 2012, 2:00:57 PM1/6/12
to ModelSim PE Student Edition
Hi, I managed to fix it. Thanks.

薛丞博

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Apr 17, 2014, 3:47:32 AM4/17/14
to modelsim-pe-s...@googlegroups.com
hello,buddy

I encounter the same situation as yours.
Can you tell me how did you fix the problem?
在 2012年1月7日星期六UTC+8上午3时00分57秒,Pladio写道:
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