Anyone wish to support with ssi/spi driver implementation?

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Pavel Nadein

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Nov 24, 2019, 3:36:50 PM11/24/19
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Hi,

Using buildroot I made kernel 5.2.8 up and running with CI20.
SPI driver over gpio work horribly slow as expected, so I decided to write my own ssi driver.
Reading manual I can't understand how to drive cs lines and start the transfer.
If anyone is interested in rising up this board from the grave, I will share my progress and help you build the images.

BR, Pavel

zea...@gmail.com

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Nov 24, 2019, 3:56:47 PM11/24/19
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Hi Pavel,

Some time ago I wrote an SPI controller driver for JZ47xx and tested it on CI20:
While it works, I never got it to act stable enough to be useful, so it didn't end up being upstreamed.
Perhaps now that there is interest, we could revisit it.

Regards,
Artur Rojek

Pavel Nadein

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Nov 24, 2019, 4:02:38 PM11/24/19
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Hi Artur,

Thanks, it will take some time for me to test your driver. I will come back later then.
Let's make it working together.

BR/ Pavel

воскресенье, 24 ноября 2019 г., 21:56:47 UTC+1 пользователь zea...@gmail.com написал:

Pavel Nadein

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Nov 28, 2019, 5:42:18 PM11/28/19
to MIPS Creator CI20
Hi Artur,
I did some small changes in DT and pinctrl to make it working with my jz4780 ci20.
Testing are being done with NRF24L01 module. For now I would say driver works almost perfect.
Only second CS have to be added I suppose. The rest is fine.
Good job, thanks for your work. Don't really expect to use this board in the future, but it is good that we now can support others with that.


воскресенье, 24 ноября 2019 г., 21:56:47 UTC+1 пользователь zea...@gmail.com написал:
Hi Pavel,

Paul Cercueil

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Nov 28, 2019, 6:44:32 PM11/28/19
to Pavel Nadein, MIPS Creator CI20
Hi Pavel,


Le jeu., nov. 28, 2019 at 14:42, Pavel Nadein <pavel...@gmail.com> a
écrit :
> Hi Artur,
> I did some small changes in DT and pinctrl to make it working with my
> jz4780 ci20.
> Testing are being done with NRF24L01 module. For now I would say
> driver works almost perfect.

From what I remember when Artur tested it, it does lose bytes here and
there, and that's the reason why it was never sent upstream. It's not
yet reliable.


> Only second CS have to be added I suppose. The rest is fine.

Second CS doesn't work?

Cheers,
-Paul

> Good job, thanks for your work. Don't really expect to use this board
> in the future, but it is good that we now can support others with
> that.
>
> воскресенье, 24 ноября 2019 г., 21:56:47 UTC+1
> пользователь zea...@gmail.com написал:
>> Hi Pavel,
>>
>> Some time ago I wrote an SPI controller driver for JZ47xx and tested
>> it on CI20:
>> https://github.com/zear/linux/commits/4.18-spi
>> While it works, I never got it to act stable enough to be useful, so
>> it didn't end up being upstreamed.
>> Perhaps now that there is interest, we could revisit it.
>>
>> Regards,
>> Artur Rojek
>>
>> On Sunday, November 24, 2019 at 9:36:50 PM UTC+1, Pavel Nadein wrote:
>>> Hi,
>>>
>>> Using buildroot I made kernel 5.2.8 up and running with CI20.
>>> SPI driver over gpio work horribly slow as expected, so I decided
>>> to write my own ssi driver.
>>> Reading manual I can't understand how to drive cs lines and start
>>> the transfer.
>>> If anyone is interested in rising up this board from the grave, I
>>> will share my progress and help you build the images.
>>>
>>> BR, Pavel
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Pavel Nadein

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Nov 29, 2019, 2:43:48 AM11/29/19
to MIPS Creator CI20
Hi Paul,

I've been testing his driver with NRF24L01 for a long time and didn't found any issues.
But if you say so, I will keep testing it for some time more. Thanks for the input.

Second CS is not implemented. I think, I should add it myself than.

BR, Pavel

пятница, 29 ноября 2019 г., 0:44:32 UTC+1 пользователь Paul Cercueil написал:
> send an email to mips-cre...@googlegroups.com.

Paul Cercueil

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Nov 29, 2019, 6:08:54 AM11/29/19
to Pavel Nadein, MIPS Creator CI20
Hi Pavel,


Le jeu., nov. 28, 2019 at 23:43, Pavel Nadein <pavel...@gmail.com> a
écrit :
> Hi Paul,
>
> I've been testing his driver with NRF24L01 for a long time and didn't
> found any issues.

The good thing with a WiFi chip is that if you get corrupted data, it
will be handled by the IP/TCP layers. That also means it may not be the
best thing to test the driver with :)

> But if you say so, I will keep testing it for some time more. Thanks
> for the input.
>
> Second CS is not implemented. I think, I should add it myself than.

It is implemented, grep for "chip_select".

Cheers,
-Paul
> send an email to mips-creator-c...@googlegroups.com.
> To view this discussion on the web, visit
> https://groups.google.com/d/msgid/mips-creator-ci20/82e7c63e-d127-480c-be54-d779fe7343f5%40googlegroups.com.


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