[PATCH 11/13] MIPS: mm: Remove code that is no longer needed.

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周琰杰 (Zhou Yanjie)

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Dec 24, 2020, 3:38:42 AM12/24/20
to h...@goldelico.com, mips-creat...@googlegroups.com, pa...@boddie.org.uk, riccardo...@libero.it
Clean up the c-r4k.c file, remove the code about Ingenic XBurst
that is no longer needed, since there is already a dedicated
cache driver for Ingenic.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouy...@wanyeetech.com>
---
arch/mips/mm/sc-mips.c | 23 -----------------------
1 file changed, 23 deletions(-)

diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index dd0a5be..46fc846 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -221,29 +221,6 @@ static inline int __init mips_sc_probe(void)
else
return 0;

- if (current_cpu_type() == CPU_XBURST) {
- switch (mips_machtype) {
- /*
- * According to config2 it would be 5-ways, but that is
- * contradicted by all documentation.
- */
- case MACH_INGENIC_JZ4770:
- case MACH_INGENIC_JZ4775:
- c->scache.ways = 4;
- break;
-
- /*
- * According to config2 it would be 5-ways and 512-sets,
- * but that is contradicted by all documentation.
- */
- case MACH_INGENIC_X1000:
- case MACH_INGENIC_X1000E:
- c->scache.sets = 256;
- c->scache.ways = 4;
- break;
- }
- }
-
c->scache.waysize = c->scache.sets * c->scache.linesz;
c->scache.waybit = __ffs(c->scache.waysize);

--
2.7.4

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